| Version 6 (modified by ruik, 7 years ago) |
|---|
Chapter 1: Introduction and Overview
Introduction and Overview
PC and Sensor Overview
What sensors are available on my PC?
Most PC's built since late 1997 now come with a hardware health monitoring chip. This chip may be accessed via the ISA bus or the SMBus, depending on the motherboard.
Some motherboard chipsets, notably the Via 686 and the SiS 5595, contain hardware monitor functions.
This FAQ frequently refers to the "LM78". This chip has been obsoleted by National Semiconductor. Most motherboards today contain a chip with similar functions.
What can a sensor chip like the "LM78" do?
The LM78 is a chip made by National Semiconductor which can monitor 7 voltages (5 positive, 2 negative) from 0 to 4.08V. The inputs are usually in series with voltage dividers which lower the +/- 12V and +/- 5V supplies to measurable range. Therefore, the readings for such inputs need to be re-scaled appropriately by software.
The LM78 also has 3 fan speed monitoring inputs, an internal temperature sensor, a chassis intrusion sensor, and a couple maskable interrupt inputs. The LM78 can also relay the processor's (P6 or Pent II) VID lines which are hardwired and used to indicate to the power regulator (usually on the mainboard close to the processor socket/slot) what voltage to supply to the processor.
The LM78 can be interfaced to a system via the ISA bus and/or the SMBus.
Most other sensor chips have comparable functionality. Each supported chip is documented in the doc/chips directory.
Where do I find out more about any of these chips?
Most semiconductor companies have comprehensive documentation, including complete datasheets, on their websites. Analog Devices, Dallas Semiconductor, Maxim, and National Semiconductor have the widest selection of sensor chips. Their websites are:
Please see the file UsefulLinks for links to other companies' websites.
Sensor and Bus Basics
How are these sensors read?
Sensor chips reside on either the ISA bus, the SMBus, or both. See the file doc/chips/SUMMARY in our package for a list.
To communicate with chips on the ISA bus, the software uses simple I/O reads and writes.
To communicate with chips on the SMBus, the software must use an SMBus interface device, explained below.
What is the SMBus? And the I2C bus?
The SMBus is the "System Management Bus". More specifically, it is a 2-wire, low-speed serial communication bus used for basic health monitoring and hardware management. It is a specific implementation of the more general I2C (pronunciation: I-squared-C) bus. In fact, both I2C devices and SMBus devices may be connected to the same (I2C) bus.
The SMBus (or I2C bus) starts at the host controller, used for starting transactions on the SMBus. From the host interface, the devices communicated with are the slave devices. Each slave device has a unique 7-bit address which the host uses to refer to that device.
For each supported SMBus host, there is a separate kernel module which implements the communication protocol with the host. Some SMBus hosts really operate on the SMBus level; these hosts can not cope with pure I2C devices. Other hosts are in fact I2C hosts: in this case, we implement the SMBus protocol in terms of I2C operations. But these hosts can also talk to pure I2C devices.
I don't have an ISA bus!
We promise, you do, even if you don't have any old ISA slots. The "ISA Bus" exists in your computer even if you don't have ISA slots; it is simply a memory-mapped area, 64KB in size (0x0000 - 0xFFFF) where many "legacy" functions, such as keyboard and interrupt controllers, are found. It isn't necessarily a separate physical bus. See the file /proc/ioports for a list of devices living on the "ISA Bus" in your system. If you don't like the term "ISA Bus" think "I/O Space".
What sensors do processors have?
Most new processors contain a thermal diode on the die itself. The electical properties of all diodes and transistors vary slightly with temperature. The thermal diode is exceptionally accurate because it is directly on the die. Newer temperature sensor chips, like the Analog Devices ADM1021 and clones, and the Winbond chips, have circuitry for measuring the the electrical properties of an external diode and converting this data to a temperature. Any sensor chip listed in doc/chips/SUMMARY in our package which has support for more than one temperature supports external temperature sensing.
Older motherboards and processors without this feature generally use an LM75 placed close to the processor. This is much less accurate.
The Pentium 2 'boxed' processor usually has an LM75 very close to the base of the box. It can be read through the SMBus to report the approximate temperature of the processor. The processor also contains an internal temperature sensor (of low accuracy) used as a fail-safe to disable the processor in case it gets much too hot (usually around 130 degrees C). And, the Pentium 2 also has a hard-wired signal (VID lines) on it's SEC (single edge connector) which indicates what power supply is required to operate the processor.
The P6 (Pentium-Pro) may have an LM75 in or just under the socket. P6's also have VID lines.
Pentiums and Pentium w/ MMX do not have VID lines, and sometimes have LM75's under the sockets (depends on the mainboard, and how 'modern' the mainboard is).
The P2 Xeon was the first Intel processor to include the SMBus interface on the P2 Xeon SEC.
How often are the sensor values updated?
The LM78, and most other sensor chips like it, reads its sensors one by one. A complete scanning sweep will take about 1.5 seconds. The LM78 stops readings sensors if you try to access it, so if you access it very often (by reading sensor values; writing new limits is safe) it will not find the time to update its sensor values at all! Fortunately, the kernel module takes care not to do this, and only reads new values each 1.5 seconds. If you read the values again, you will get the 'old' values again.
How are alarms triggered?
It is possible to monitor each sensor and have an alarm go off if it crosses some pre-determined limits. There are two sorts of interrupts which can be generated by sensor chips if this happens (it depends a bit on the actual chip if both are supported; the LM80, for example, has only IRQ interrupts): IRQ interrupts and SMI interrupts. IRQ stands for Interrupt Request and are the interrupt lines you can find in /proc/interrupts. SMI stands for System Management Interrupt, and is a special interrupt which puts the processor in a secure environment independent of any other things running. SMI is currently not supported by the Linux kernel. IRQs are supported, of course.
Even if no interrupt is generated, some bits in a status register will be set until the register is read the next time. If the alarm condition persists after that, the bits will be set on the next scanning sweep, etc.
Most drivers in our package do not support interrupts at this time.
