Changeset 3749
- Timestamp:
- 12/22/02 14:24:32 (10 years ago)
- Location:
- i2c/trunk/kernel
- Files:
-
- 2 modified
-
i2c-algo-biths.c (modified) (30 diffs)
-
i2c-algo-biths.h (modified) (5 diffs)
Legend:
- Unmodified
- Added
- Removed
-
i2c/trunk/kernel/i2c-algo-biths.c
r3748 r3749 3 3 /* ------------------------------------------------------------------------- */ 4 4 /* Copyright (C) 1995-2000 Simon G. Vogl 5 Copyright (C) 2002-2003 Kyösti Mälkki 5 6 6 7 This program is free software; you can redistribute it and/or modify … … 18 19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ 19 20 /* ------------------------------------------------------------------------- */ 20 21 /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even22 Frodo Looijaard <frodol@dds.nl> */23 21 24 22 /* $Id$ */ … … 43 41 * directories, or load this module manually. 44 42 */ 43 #ifndef ALGO_BIT_COMPATIBILITY 45 44 #define ALGO_BIT_COMPATIBILITY 0 45 #endif 46 46 47 47 #define FATAL_BUS 0 … … 74 74 75 75 /* Bus timing for 50/50 duty cycle : T_setup + T_hold = T_scllo = T_sclhi */ 76 /* Where to use 2 x adap->udelay */ 77 #define T_min 0 /* after any SCL SDA change */ 78 #define T_sclhi 1 /* SCL high */ 79 #define T_scllo 1 /* SCL low */ 80 #define T_setup 0 /* SDA change to SCL rise */ 81 #define T_hold 0 /* SCL fall to SDA change */ 82 83 #define _sf(a) adap->flags|=(a) 84 #define _cf(a) adap->flags&=~(a) 85 #define ___setscl(b) if (b) _sf(_HS_SCL); else _cf(_HS_SCL); adap->setscl(adap) 86 #define ___setsda(b) if (b) _sf(_HS_SDA); else _cf(_HS_SDA); adap->setsda(adap) 87 88 #define __setdt(x,dt) if (dt) _sf(_HS_DBL_DT); x; /* cleared after use */ 76 /* Run setscl/setsda with a special flag */ 77 #define T_min 0 /* after any SCL SDA change */ 78 #define T_sclhi _HS_DBL_DT /* SCL high */ 79 #define T_scllo _HS_DBL_DT /* SCL low */ 80 #define T_setup 0 /* SDA change to SCL rise */ 81 #define T_hold 0 /* SCL fall to SDA change */ 82 83 #define _sf(a) adap->ctrl|=(a) 84 #define _cf(a) adap->ctrl&=~(a) 85 #define ___setscl(b) if (b) _sf(_HS_SCL); else _cf(_HS_SCL);\ 86 adap->setstate(adap); adap->setscl(adap) 87 #define ___setsda(b) if (b) _sf(_HS_SDA); else _cf(_HS_SDA);\ 88 adap->setstate(adap); adap->setsda(adap) 89 90 #define __setdt(x,dt) if (dt) _sf(dt); x; if (dt) _cf(dt) 89 91 #define __setscl(b,dt) __setdt(___setscl(b),dt); 90 #define __setsda(b,dt) __ _setsda(b); /* fixed post-SDA delay */92 #define __setsda(b,dt) __setdt(___setsda(b),dt); 91 93 #define __getscl() adap->getscl(adap) 92 94 #define __getsda() adap->getsda(adap) 93 95 94 96 95 #define RETURN_ON_FAILURE(x) x; if (adap-> flags & _HS_ERROR) return97 #define RETURN_ON_FAILURE(x) x; if (adap->errors) return 96 98 #define TRY(x) RETURN_ON_FAILURE(x) 97 #define TRY0(x) RETURN_ON_FAILURE(x) 098 99 99 100 #define _setscl(b,dt) RETURN_ON_FAILURE(__setscl(b,dt)) … … 113 114 PROTO_S("S"); 114 115 /* assert: scl, sda undef */ 115 adap-> flags &= ~_HS_ERROR;116 adap->errors = 0; 116 117 _sdahi(T_setup); 117 118 _sclhi(T_min); … … 125 126 PROTO_S(" P"); 126 127 /* scl undef after error, sda, scl freedom unknown */ 127 adap-> flags&= ~(_HS_SDA_FREE | _HS_DBL_DT);128 if (adap-> flags & _HS_ERROR) {129 adap-> flags &= ~_HS_ERROR;128 adap->ctrl &= ~(_HS_SDA_FREE | _HS_DBL_DT); 129 if (adap->errors) { 130 adap->errors = 0; 130 131 _scllo(T_hold); 131 132 } … … 137 138 } 138 139 139 static void i2c_outbit(struct i2c_algo_biths_data *adap, int sda) 140 { 141 PROTO_B("o"); 140 141 static void i2c_outbits(struct i2c_algo_biths_data *adap, int i) 142 { 142 143 /* assert: scl is low */ 143 _setsda(sda, T_setup); 144 _sclhi(T_sclhi); 145 _scllo(T_hold); 144 PROTO_B("."); 145 while (i--) { 146 PROTO_B("o"); 147 _setsda(adap->shiftreg & 0x80, T_setup); 148 _sclhi(T_sclhi); 149 _scllo(T_hold); 150 adap->shiftreg<<=1; 151 } 146 152 /* assert: scl is low */ 147 153 } 148 154 149 static void i2c_inbit(struct i2c_algo_biths_data *adap, int *sda) 150 { 151 PROTO_B("i"); 155 static void i2c_inbits(struct i2c_algo_biths_data *adap, int i) 156 { 152 157 /* assert: scl is low, sda undef */ 153 _sdahi(T_setup); 154 _sclhi(T_sclhi); 155 *sda = _getsda(); 156 _scllo(T_hold); 158 adap->ctrl |= _HS_SDA_FREE; 159 PROTO_B("."); 160 while (i--) { 161 PROTO_B("i"); 162 _sdahi(T_setup); 163 _sclhi(T_sclhi); 164 adap->shiftreg<<=1; 165 if (_getsda()) 166 adap->shiftreg |= 0x01; 167 _scllo(T_hold); 168 } 169 adap->ctrl &= ~_HS_SDA_FREE; 157 170 /* assert: scl is low */ 158 171 } 159 172 160 static void i2c_outb(struct i2c_algo_biths_data *adap, unsigned short flags, char c) 161 { 162 int i, sda; 163 164 PROTO_B("."); 165 for ( i=7 ; i>=0 ; i-- ) { 166 TRY(i2c_outbit(adap, (c>>i) & 1)); 167 } 168 PROTO_X(" %02X ", c & 0xff); 169 170 /* assert: scl is low */ 171 /* read ack: SDA should be pulled down by slave */ 172 PROTO_B("."); 173 adap->flags |= _HS_SDA_FREE; 174 TRY(i2c_inbit(adap, &sda)); 175 adap->flags &= ~_HS_SDA_FREE; 176 177 if (sda==0) { /* ack: sda is pulled low ->success. */ 178 PROTO_S("[A]"); 179 } else if (flags & I2C_M_IGNORE_NAK) { 180 PROTO_S("[NA]"); 181 } else { 182 PROTO_S("[NA]"); 183 adap->flags |= _HS_NAK; 184 } 185 } 186 187 static int i2c_inb(struct i2c_algo_biths_data *adap, unsigned short flags, int ack) 188 { 189 /* read byte via i2c port, without start/stop sequence */ 190 int i, sda; 191 char indata=0; 192 193 PROTO_B("."); 194 adap->flags |= _HS_SDA_FREE; 195 for ( i=7 ; i>=0 ; i--) { 196 TRY0(i2c_inbit(adap, &sda)); 197 if ( sda ) 198 indata |= (1<<i); 199 } 200 adap->flags &= ~_HS_SDA_FREE; 201 PROTO_X(" [%02X] ", indata & 0xff); 202 203 if (! (flags & I2C_M_NO_RD_ACK)) { 204 PROTO_B("."); 205 TRY0(i2c_outbit(adap, !ack)); /* send ack */ 206 if ( ack ) { 207 PROTO_S("A"); 173 static void i2c_outb(struct i2c_algo_biths_data *adap, unsigned short flags, 174 char *buf, int *count) 175 { 176 while (*count) { 177 adap->shiftreg = *buf++; 178 TRY(i2c_outbits(adap, 8)); 179 PROTO_X(" %02X ", adap->shiftreg); 180 181 /* read ack: SDA should be pulled down by slave */ 182 TRY(i2c_inbits(adap, 1)); 183 184 if (! (adap->shiftreg & 0x01)) { 185 PROTO_S("[A]"); 186 } else if (flags & I2C_M_IGNORE_NAK) { 187 PROTO_S("[NA]"); 208 188 } else { 209 PROTO_S("NA"); 189 PROTO_S("[NA]"); 190 adap->errors |= _HS_NAK; 210 191 } 211 } 212 213 /* assert: scl is low , sda undef */ 214 return indata; 215 } 192 if (adap->errors) return; 193 (*count)--; 194 } 195 } 196 197 static void i2c_inb(struct i2c_algo_biths_data *adap, unsigned short flags, 198 char *buf, int *count) 199 { 200 while (*count) { 201 TRY(i2c_inbits(adap, 8)); 202 *buf++ = adap->shiftreg; 203 PROTO_X(" [%02X] ", adap->shiftreg); 204 205 if (! (flags & I2C_M_NO_RD_ACK)) { 206 if (*count == 1) /* was last */ 207 adap->shiftreg = 0x80; 208 else 209 adap->shiftreg = 0x00; 210 TRY(i2c_outbits(adap,1)); 211 212 if (*count == 1) { 213 PROTO_S("NA"); 214 } else { 215 PROTO_S("A"); 216 } 217 } 218 (*count)--; 219 } 220 } 221 216 222 217 223 static void debug_protocol(struct i2c_algo_biths_data *adap, int retval) … … 257 263 static int errflag(int flags) 258 264 { 259 if (! (flags & _HS_ERROR))265 if (! flags) 260 266 return 2; 261 267 if (flags & _HS_HW_FAIL) … … 278 284 279 285 /* 280 * Sanity check for the adapter hardware - check the reaction of 281 * the bus lines only if it seems to be idle. 286 * Sanity check for the adapter hardware 282 287 */ 283 288 static int test_bus(struct i2c_algo_biths_data *adap) … … 294 299 sscl = test[i][1]; 295 300 296 adap-> flags &= ~_HS_ERROR;301 adap->errors = 0; 297 302 __setsda(ssda, T_min); 298 303 gsda = __getsda() ? 1 : 0; 299 errors = adap-> flags & (_HS_HW_FAIL | _HS_SDA_ARB);304 errors = adap->errors & (_HS_HW_FAIL | _HS_SDA_ARB); 300 305 if (errors) 301 306 printk(KERN_WARNING "i2c-algo-biths.o: %s %s\n", adap->name, … … 304 309 __setscl(sscl, T_min); 305 310 gscl = __getscl() ? 1 : 0; 306 errors = adap-> flags & (_HS_HW_FAIL | _HS_TIMEOUT);311 errors = adap->errors & (_HS_HW_FAIL | _HS_TIMEOUT); 307 312 if (errors) 308 313 printk(KERN_WARNING "i2c-algo-biths.o: %s %s\n", adap->name, … … 314 319 if ( ssda!=gsda ) 315 320 printk(KERN_WARNING "i2c-algo-biths.o: %s SDA set %d, got %d!\n", adap->name, ssda, gsda); 316 if ( (adap-> flags & _HS_ERROR) || sscl!=gscl || ssda!=gsda )321 if ( (adap->errors) || sscl!=gscl || ssda!=gsda ) 317 322 break; 318 323 i++; … … 321 326 __setsda(1,0); 322 327 __setscl(1,0); 323 adap-> flags &= ~_HS_ERROR;328 adap->errors = 0; 324 329 325 330 if (test[i][0]==-1) { … … 332 337 } 333 338 334 /* ----- Utility functions 335 */ 336 337 static void doDataBytes(struct i2c_algo_biths_data *adap, struct i2c_msg *msg) 338 { 339 char *temp = msg->buf; 340 341 msg->done = 0; 342 while (msg->done < msg->len) { 343 if ( msg->flags & I2C_M_RD ) { 344 TRY(*temp++ = i2c_inb(adap, msg->flags, msg->done < msg->len-1) ); 345 } else { 346 TRY(i2c_outb(adap, msg->flags, *temp++)); 347 } 348 msg->done++; 349 } 350 } 351 352 /* doAddress initiates the transfer by generating the start condition (in 353 * try_address) and transmits the address in the necessary format to handle 339 340 /* doAddress transmits the address in the necessary format to handle 354 341 * reads, writes as well as 10bit-addresses. 355 342 */ … … 357 344 static void doAddress(struct i2c_algo_biths_data *adap, struct i2c_msg *msg) 358 345 { 359 unsigned char addr; 360 361 if ( (msg->flags & I2C_M_TEN) ) { 346 unsigned char addr[2]; 347 int count; 348 349 if ( msg->flags & I2C_M_TEN ) { 362 350 /* a ten bit address */ 363 addr = 0xf0 | (( msg->addr >> 7) & 0x03); 364 365 /* try extended address code...*/ 366 TRY(i2c_outb(adap, msg->flags, addr)); 367 368 /* the remaining 8 bit address */ 369 TRY(i2c_outb(adap, msg->flags, msg->addr & 0x7f)); 351 count = 2; 352 addr[0] = 0xf0 | (( msg->addr >> 7) & 0x03); 353 addr[1] = msg->addr & 0x7f; 354 355 /* try extended address code ... and the remaining 8 bit address */ 356 TRY(i2c_outb(adap, msg->flags, addr, &count)); 370 357 371 358 if ( msg->flags & I2C_M_RD ) { … … 373 360 374 361 /* okay, now switch into reading mode */ 375 addr |= 0x01; 376 TRY(i2c_outb(adap, msg->flags, addr)); 362 count = 1; 363 addr[0] |= 0x01; 364 TRY(i2c_outb(adap, msg->flags, addr, &count)); 377 365 } 378 366 } else { /* normal 7bit address */ 379 addr = ( msg->addr << 1 ); 367 count = 1; 368 addr[0] = ( msg->addr << 1 ); 380 369 if (msg->flags & I2C_M_RD ) 381 addr |= 1;370 addr[0] |= 1; 382 371 if (msg->flags & I2C_M_REV_DIR_ADDR ) 383 addr ^= 1;384 TRY(i2c_outb(adap, msg->flags, addr ));372 addr[0] ^= 1; 373 TRY(i2c_outb(adap, msg->flags, addr, &count)); 385 374 } 386 375 } … … 400 389 struct i2c_msg *msg = msgs; 401 390 struct i2c_algo_biths_data *adap = i2c_adap->algo_data; 402 int i, j, state;391 int mn, j, state; 403 392 enum { MSG_INIT, MSG_START, MSG_ADDRESS, MSG_DATA, MSG_READY, MSG_STOP, MSG_EXIT }; 404 393 405 394 state = MSG_INIT; 406 i=0;395 mn=0; 407 396 408 397 adap->dstr=NULL; … … 421 410 422 411 case MSG_INIT: 423 msg = &msgs[ i];424 if ((msg->flags & I2C_M_NOSTART) && ( i)) {412 msg = &msgs[mn]; 413 if ((msg->flags & I2C_M_NOSTART) && (mn)) { 425 414 state = MSG_DATA; 426 415 break; … … 429 418 case MSG_START: 430 419 i2c_start(adap); 431 if (adap-> flags & _HS_ERROR) {420 if (adap->errors) { 432 421 state = MSG_STOP; 433 422 break; … … 436 425 case MSG_ADDRESS: 437 426 doAddress(adap, msg); 438 if (adap-> flags & _HS_ERROR) {427 if (adap->errors) { 439 428 state = MSG_STOP; 440 429 break; … … 442 431 443 432 case MSG_DATA: 444 doDataBytes(adap, msg); 445 if (adap->flags & _HS_ERROR) { 433 j = msg->len; 434 if ( msg->flags & I2C_M_RD ) { 435 i2c_inb(adap, msg->flags, msg->buf, &j); 436 } else { 437 i2c_outb(adap, msg->flags, msg->buf, &j); 438 } 439 msg->done = msg->len - j; 440 if (adap->errors) { 446 441 state = MSG_STOP; 447 442 break; … … 449 444 450 445 case MSG_READY: 451 i++;452 if ( i<num) {453 msg->err = errflag(adap-> flags);446 mn++; 447 if (mn<num) { 448 msg->err = errflag(adap->errors); 454 449 debug_protocol(adap, msg->err); 455 450 state = MSG_INIT; … … 458 453 459 454 case MSG_STOP: 460 msg->err = errflag(adap-> flags);455 msg->err = errflag(adap->errors); 461 456 i2c_stop(adap); 462 457 j = 0; 463 while (adap-> flags & _HS_ERROR) {458 while (adap->errors) { 464 459 if ( ++j > 10) { 465 460 msg->err = -ENODEV; … … 484 479 debug_printout(i2c_adap, j, msgs[j].err); 485 480 486 return (msg->err < 0) ? msg->err : i;481 return (msg->err < 0) ? msg->err : mn; 487 482 } 488 483 … … 519 514 static inline void _hw_setscl(struct i2c_algo_bit_data *old, int state) 520 515 { 521 old->setscl(old->data, state & _HS_SCL);516 old->setscl(old->data, state & _HS_SCL); 522 517 } 523 518 524 519 static inline void _hw_setsda(struct i2c_algo_bit_data *old, int state) 525 520 { 526 old->setsda(old->data, state & _HS_SDA);521 old->setsda(old->data, state & _HS_SDA); 527 522 } 528 523 529 524 static inline int _hw_getscl(struct i2c_algo_bit_data *old) 530 525 { 531 return old->getscl(old->data);526 return old->getscl(old->data); 532 527 } 533 528 534 529 static inline int _hw_getsda(struct i2c_algo_bit_data *old) 535 530 { 536 return old->getsda(old->data); 537 } 538 539 static inline void _hw_timer(int dt) 540 { 541 udelay(dt); 531 return old->getsda(old->data); 542 532 } 543 533 544 534 #define INCLUDE_BITHS_INLINES 545 535 #include "i2c-algo-biths.h" 546 static void _ba_setscl(struct i2c_algo_biths_data *adap) 547 { 548 adap->state = adap->flags; 549 i2c_bit_setscl(adap); 550 } 551 static void _ba_setsda(struct i2c_algo_biths_data *adap) 552 { 553 adap->state = adap->flags; 554 i2c_bit_setsda(adap); 555 } 556 static int _ba_getscl(struct i2c_algo_biths_data *adap) 557 { 558 return i2c_bit_getscl(adap); 559 } 560 static int _ba_getsda(struct i2c_algo_biths_data *adap) 561 { 562 return i2c_bit_getsda(adap); 563 } 564 565 static struct i2c_algo_biths_data _ba_template = { 566 setsda: _ba_setsda, 567 setscl: _ba_setscl, 568 getsda: _ba_getsda, 569 getscl: _ba_getscl, 536 static _HS_ATTR_ void _old_setstate(struct i2c_algo_biths_data *adap) 537 { 538 adap->hw_state = adap->ctrl; 539 } 540 541 static _HS_ATTR_ void _old_setscl(struct i2c_algo_biths_data *adap) 542 { 543 i2c_bit_setscl(adap); 544 } 545 static _HS_ATTR_ void _old_setsda(struct i2c_algo_biths_data *adap) 546 { 547 i2c_bit_setsda(adap); 548 } 549 static _HS_ATTR_ int _old_getscl(struct i2c_algo_biths_data *adap) 550 { 551 return i2c_bit_getscl(adap); 552 } 553 static _HS_ATTR_ int _old_getsda(struct i2c_algo_biths_data *adap) 554 { 555 return i2c_bit_getsda(adap); 556 } 557 558 static struct i2c_algo_biths_data _old_template = { 559 setstate: _old_setstate, 560 setsda: _old_setsda, 561 setscl: _old_setscl, 562 getsda: _old_getsda, 563 getscl: _old_getscl, 570 564 }; 571 565 … … 583 577 return -ENOMEM; 584 578 585 memcpy(adap, &_ ba_template, sizeof(struct i2c_algo_biths_data));586 adap-> data = old_adap;587 adap-> udelay = (old_adap->udelay+1)>>1; /* 1/4 vs 1/2 cycle*/579 memcpy(adap, &_old_template, sizeof(struct i2c_algo_biths_data)); 580 adap->hw_data = old_adap; 581 adap->xloops = old_adap->udelay * 0x0863; /* 1/4 vs 1/2 cycle, 0x10c6 / 2 */ 588 582 adap->timeout = old_adap->timeout; 589 583 i2c_adap->algo_data = adap; … … 608 602 609 603 #endif 604 605 #ifdef rdtscl 606 /* TSC stuff from arch/i386/lib/delay.c */ 607 608 static _HS_ATTR_ void i2c_tsc_set(struct i2c_algo_biths_data *adap) 609 { 610 rdtscl(adap->bclock); 611 } 612 613 static _HS_ATTR_ void i2c_tsc_run(struct i2c_algo_biths_data *adap) 614 { 615 unsigned long now, loops, xloops; 616 int d0; 617 xloops = adap->xloops; 618 __asm__("mull %0" 619 :"=d" (xloops), "=&a" (d0) 620 :"1" (xloops),"0" (current_cpu_data.loops_per_jiffy)); 621 loops = xloops * HZ; 622 do 623 { 624 rep_nop(); 625 rdtscl(now); 626 } while ( (now - adap->bclock) < loops ); 627 } 628 629 #else 630 631 static _HS_ATTR_ void i2c_udelay_set(struct i2c_algo_biths_data *adap) {} 632 633 static _HS_ATTR_ void i2c_udelay_run(struct i2c_algo_biths_data *adap) 634 { 635 int usecs; 636 /* adap->xloops = usecs * 0x000010c6 / 2; */ 637 usecs = ((adap->xloops + 0x0863) >> 12); 638 if (adap->ctrl & _HS_DBL_DT) 639 usecs<<=1; 640 udelay(usecs); 641 } 642 643 #endif /* rdtscl */ 644 610 645 611 646 /* … … 621 656 adap->dstr = 0; // no protocol dump buffer 622 657 658 if (adap->set_timer == NULL) { 659 #ifdef rdtscl /* if (x86_udelay_tsc) here instead ? */ 660 adap->set_timer = i2c_tsc_set; 661 adap->run_timer = i2c_tsc_run; 662 #else 663 adap->set_timer = i2c_udelay_set; 664 adap->run_timer = i2c_udelay_run; 665 #endif 666 } 667 623 668 if (bit_test) { 624 669 int ret = test_bus(adap); … … 665 710 { 666 711 printk(KERN_INFO "i2c-algo-biths.o: i2c high-speed bit algorithm module version %s (%s)\n", I2C_VERSION, I2C_DATE); 712 #ifdef rdtscl 713 DEB1(printk(KERN_DEBUG "i2c-algo-biths.o: ... will use rdtscl() for bus clock\n")); 714 #else 715 DEB1(printk(KERN_DEBUG "i2c-algo-biths.o: ... will use udelay() for bus clock\n"); 716 #endif 667 717 return 0; 668 718 } … … 674 724 675 725 #ifdef MODULE 676 MODULE_AUTHOR(" Simon G. Vogl <simon@tk.uni-linz.ac.at>");726 MODULE_AUTHOR("Kyösti Mälkki <kmalkki@cc.hut.fi>"); 677 727 MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm"); 678 728 #ifdef MODULE_LICENSE -
i2c/trunk/kernel/i2c-algo-biths.h
r3747 r3749 49 49 */ 50 50 struct i2c_algo_biths_data { 51 void * data; /* private data for lowlevel routines */52 int state;51 void *hw_data; /* private data for lowlevel routines */ 52 int hw_state; 53 53 void (*setscl)(struct i2c_algo_biths_data *adap) _HS_ATTR_ ; 54 54 void (*setsda)(struct i2c_algo_biths_data *adap) _HS_ATTR_ ; 55 55 int (*getscl) (struct i2c_algo_biths_data *adap) _HS_ATTR_ ; 56 56 int (*getsda) (struct i2c_algo_biths_data *adap) _HS_ATTR_ ; 57 int flags; 57 58 void (*setstate)(struct i2c_algo_biths_data *adap) _HS_ATTR_ ; 59 void (*set_timer)(struct i2c_algo_biths_data *adap) _HS_ATTR_ ; 60 void (*run_timer)(struct i2c_algo_biths_data *adap) _HS_ATTR_ ; 61 62 short ctrl; 63 short errors; 64 char shiftreg; 58 65 59 66 /* local settings */ 60 int udelay; /* 1/4 clock-cycle time in microsecs */ 61 /* i.e. clock is (250 / udelay) KHz */ 67 unsigned long bclock; 68 unsigned long xloops; /* 1/4 clock-cycle time in x86 TSC ticks */ 69 /* i.e. bus clock is 250*0x10c6 / xloops kHz */ 70 62 71 int timeout; /* in jiffies */ 63 72 char *name; /* replicate i2c_adapter->name */ … … 73 82 #define _HS_DBL_DT 0x0010 /* T_sclhi is twice longer */ 74 83 75 #define _HS_NAK 0x0100 76 #define _HS_TIMEOUT 0x0200 77 #define _HS_SDA_ARB 0x0400 78 #define _HS_HW_FAIL 0x0800 79 #define _HS_ERROR 0xff00 84 #define _HS_NAK 0x0001 85 #define _HS_TIMEOUT 0x0002 86 #define _HS_SDA_ARB 0x0004 87 #define _HS_HW_FAIL 0x0008 80 88 81 89 int i2c_biths_add_bus(struct i2c_adapter *); … … 88 96 /* --- setting states on the bus with the right timing: --------------- */ 89 97 98 #define _hw_timer_set(adap) adap->set_timer(adap) 99 #define _hw_timer_run(adap) adap->run_timer(adap) 100 101 static inline int sda_not_set(struct i2c_algo_biths_data *adap, int rdcount) 102 { 103 int sda; 104 /* allow some rise/fall time */ 105 while ( rdcount-- ) { 106 sda = _hw_getsda(adap->hw_data); 107 if (adap->ctrl & _HS_SDA) { 108 if (sda) 109 return 0; 110 if (!rdcount) { 111 adap->errors |= _HS_SDA_ARB; 112 return -1; 113 } 114 } else { /* !(adap->ctrl & _HS_SDA) */ 115 if (!sda) 116 return 0; 117 if (!rdcount) { 118 adap->errors |= _HS_HW_FAIL; 119 return -1; 120 } 121 } 122 } 123 return 0; 124 } 125 90 126 static inline void i2c_bit_setsda(struct i2c_algo_biths_data *adap) 91 127 { 92 int rdcount = 10; 93 int sda; 94 _hw_setsda(adap->data, adap->state); 95 if ( !(adap->flags & _HS_SDA_FREE)) { 96 /* allow some rise/fall time */ 97 while ( rdcount ) { 98 sda = _hw_getsda(adap->data); 99 if (adap->flags & _HS_SDA) { 100 if (sda) break; 101 } else { 102 if (! sda) break; 103 } 104 rdcount--; 105 } 106 if (!rdcount) { 107 if (adap->flags & _HS_SDA) { 108 adap->flags |= _HS_SDA_ARB; 109 } else { 110 adap->flags |= _HS_HW_FAIL; 111 } 112 return; 113 } 128 _hw_setsda(adap->hw_data, adap->hw_state); 129 if ( !(adap->ctrl & _HS_SDA_FREE) && sda_not_set(adap, 10)) { 130 return; 114 131 } 115 _hw_timer(adap->udelay); 132 _hw_timer_set(adap); 133 _hw_timer_run(adap); 116 134 } 117 135 … … 125 143 #ifndef HW_CANNOT_READ_SCL /* Not all adapters have scl sense line... */ 126 144 int rdcount = 10; 127 _hw_setscl(adap-> data, adap->state);128 if (adap-> flags& _HS_SCL) {145 _hw_setscl(adap->hw_data, adap->hw_state); 146 if (adap->ctrl & _HS_SCL) { 129 147 unsigned long start; 130 int sda;131 148 /* allow some rise time */ 132 while (rdcount && !_hw_getscl(adap-> data)) rdcount--;133 /* else cl ient pulling SCL low*/149 while (rdcount && !_hw_getscl(adap->hw_data)) rdcount--; 150 /* else clock synchronisation, give more time */ 134 151 start = jiffies; 135 while (!rdcount && !_hw_getscl(adap-> data)) {152 while (!rdcount && !_hw_getscl(adap->hw_data)) { 136 153 if ( time_after(jiffies, start+adap->timeout) ) { 137 adap-> flags |= _HS_TIMEOUT; /* scl undef */154 adap->errors |= _HS_TIMEOUT; /* scl undef */ 138 155 return; 139 156 } … … 145 162 #endif 146 163 } 147 if ( !(adap->flags & _HS_SDA_FREE)) { 148 /* test for SDA arbitration when SCL is high */ 149 sda = _hw_getsda(adap->data); 150 if (adap->flags & _HS_SDA) { 151 if (!sda) { 152 adap->flags |= _HS_SDA_ARB; 153 return; 154 } 155 } else { /* !(adap->flag & _HS_SDA) */ 156 if (sda) { 157 adap->flags |= _HS_HW_FAIL; 158 return; 159 } 160 } 164 _hw_timer_set(adap); 165 /* test for SDA arbitration when SCL is high */ 166 if ( !(adap->ctrl & _HS_SDA_FREE) && sda_not_set(adap, 1)) { 167 return; 161 168 } 162 169 } else { 163 170 /* allow some fall time */ 164 while (rdcount && _hw_getscl(adap-> data)) rdcount--;171 while (rdcount && _hw_getscl(adap->hw_data)) rdcount--; 165 172 if ( !rdcount ) { 166 adap-> flags |= _HS_HW_FAIL;173 adap->errors |= _HS_HW_FAIL; 167 174 return; 168 175 } 176 _hw_timer_set(adap); 169 177 } 170 178 #else 171 _hw_setscl(adap->data, adap->state); 179 _hw_setscl(adap->hw_data, adap->hw_state); 180 _hw_timer_set(adap); 172 181 #endif /* HW_CANNOT_READ_SCL */ 173 if (adap->flags & _HS_DBL_DT) { 174 adap->flags &= ~_HS_DBL_DT; 175 _hw_timer(adap->udelay<<1); 176 } else { 177 _hw_timer(adap->udelay); 178 } 182 _hw_timer_run(adap); 179 183 } 180 184 181 #define i2c_bit_getscl(adap) _hw_getscl(adap->data) 182 #define i2c_bit_getsda(adap) _hw_getsda(adap->data) 185 static inline int i2c_bit_getscl(struct i2c_algo_biths_data *adap) 186 { 187 return _hw_getscl(adap->hw_data); 188 } 189 190 static inline int i2c_bit_getsda(struct i2c_algo_biths_data *adap) 191 { 192 return _hw_getsda(adap->hw_data); 193 } 183 194 184 195 #endif
