Changeset 1763 for lm-sensors/trunk/kernel/busses/i2c-i801.c
- Timestamp:
- 06/06/03 03:49:49 (10 years ago)
- Files:
-
- 1 modified
-
lm-sensors/trunk/kernel/busses/i2c-i801.c (modified) (23 diffs)
Legend:
- Unmodified
- Added
- Removed
-
lm-sensors/trunk/kernel/busses/i2c-i801.c
r1708 r1763 50 50 #include <asm/io.h> 51 51 #include "version.h" 52 53 MODULE_LICENSE("GPL"); 52 #include "sensors_compat.h" 54 53 55 54 #ifdef I2C_FUNC_SMBUS_BLOCK_DATA_PEC … … 57 56 #endif 58 57 59 #ifndef PCI_DEVICE_ID_INTEL_82801CA_SMBUS60 #define PCI_DEVICE_ID_INTEL_82801CA_SMBUS 0x248361 #endif62 63 #ifndef PCI_DEVICE_ID_INTEL_82801DB_SMBUS64 #define PCI_DEVICE_ID_INTEL_82801DB_SMBUS 0x24C365 #endif66 67 static int supported[] = {PCI_DEVICE_ID_INTEL_82801AA_3,68 PCI_DEVICE_ID_INTEL_82801AB_3,69 PCI_DEVICE_ID_INTEL_82801BA_2,70 PCI_DEVICE_ID_INTEL_82801CA_SMBUS,71 PCI_DEVICE_ID_INTEL_82801DB_SMBUS,72 0 };73 74 58 /* I801 SMBus address offsets */ 75 #define SMBHSTSTS (0 + i801_smba)76 #define SMBHSTCNT (2 + i801_smba)77 #define SMBHSTCMD (3 + i801_smba)78 #define SMBHSTADD (4 + i801_smba)79 #define SMBHSTDAT0 (5 + i801_smba)80 #define SMBHSTDAT1 (6 + i801_smba)81 #define SMBBLKDAT (7 + i801_smba)82 #define SMBPEC (8 + i801_smba) /* ICH4 only */83 #define SMBAUXSTS (12 + i801_smba) /* ICH4 only */84 #define SMBAUXCTL (13 + i801_smba) /* ICH4 only */59 #define SMBHSTSTS (0 + i801_smba) 60 #define SMBHSTCNT (2 + i801_smba) 61 #define SMBHSTCMD (3 + i801_smba) 62 #define SMBHSTADD (4 + i801_smba) 63 #define SMBHSTDAT0 (5 + i801_smba) 64 #define SMBHSTDAT1 (6 + i801_smba) 65 #define SMBBLKDAT (7 + i801_smba) 66 #define SMBPEC (8 + i801_smba) /* ICH4 only */ 67 #define SMBAUXSTS (12 + i801_smba) /* ICH4 only */ 68 #define SMBAUXCTL (13 + i801_smba) /* ICH4 only */ 85 69 86 70 /* PCI Address Constants */ 87 #define SMBBA 0x02088 #define SMBHSTCFG 0x04089 #define SMBREV 0x00871 #define SMBBA 0x020 72 #define SMBHSTCFG 0x040 73 #define SMBREV 0x008 90 74 91 75 /* Host configuration bits for SMBHSTCFG */ 92 #define SMBHSTCFG_HST_EN 193 #define SMBHSTCFG_SMB_SMI_EN 294 #define SMBHSTCFG_I2C_EN 476 #define SMBHSTCFG_HST_EN 1 77 #define SMBHSTCFG_SMB_SMI_EN 2 78 #define SMBHSTCFG_I2C_EN 4 95 79 96 80 /* Other settings */ 97 #define MAX_TIMEOUT 10098 #define ENABLE_INT9 0 /* set to 0x01 to enable - untested */81 #define MAX_TIMEOUT 100 82 #define ENABLE_INT9 0 /* set to 0x01 to enable - untested */ 99 83 100 84 /* I801 command constants */ 101 #define I801_QUICK 0x00102 #define I801_BYTE 0x04103 #define I801_BYTE_DATA 0x08104 #define I801_WORD_DATA 0x0C105 #define I801_PROC_CALL 0x10 /* later chips only, unimplemented */106 #define I801_BLOCK_DATA 0x14107 #define I801_I2C_BLOCK_DATA 0x18 /* unimplemented */108 #define I801_BLOCK_LAST 0x34109 #define I801_I2C_BLOCK_LAST 0x38 /* unimplemented */110 #define I801_START 0x40111 #define I801_PEC_EN 0x80 /* ICH4 only */85 #define I801_QUICK 0x00 86 #define I801_BYTE 0x04 87 #define I801_BYTE_DATA 0x08 88 #define I801_WORD_DATA 0x0C 89 #define I801_PROC_CALL 0x10 /* later chips only, unimplemented */ 90 #define I801_BLOCK_DATA 0x14 91 #define I801_I2C_BLOCK_DATA 0x18 /* unimplemented */ 92 #define I801_BLOCK_LAST 0x34 93 #define I801_I2C_BLOCK_LAST 0x38 /* unimplemented */ 94 #define I801_START 0x40 95 #define I801_PEC_EN 0x80 /* ICH4 only */ 112 96 113 97 /* insmod parameters */ … … 121 105 "EXTREMELY DANGEROUS!"); 122 106 123 124 125 126 127 107 static void i801_do_pause(unsigned int amount); 128 108 static int i801_transaction(void); … … 130 110 char read_write, int command); 131 111 132 133 134 135 static unsigned short i801_smba = 0; 136 static struct pci_dev *I801_dev = NULL; 137 static int isich4 = 0; 138 139 /* Detect whether a I801 can be found, and initialize it, where necessary. 140 Note the differences between kernels with the old PCI BIOS interface and 141 newer kernels with the real PCI interface. In compat.h some things are 142 defined to make the transition easier. */ 143 int i801_setup(void) 112 static unsigned short i801_smba; 113 static struct pci_dev *I801_dev; 114 static int isich4; 115 116 static int i801_setup(struct pci_dev *dev) 144 117 { 145 118 int error_return = 0; 146 int *num = supported;147 119 unsigned char temp; 148 120 149 /* First check whether we can access PCI at all */150 if (pci_present() == 0) {151 printk(KERN_WARNING "i2c-i801.o: Error: No PCI-bus found!\n");152 error_return = -ENODEV;153 goto END;154 }155 156 /* Look for each chip */157 121 /* Note: we keep on searching until we have found 'function 3' */ 158 I801_dev = NULL; 159 do { 160 if((I801_dev = pci_find_device(PCI_VENDOR_ID_INTEL, 161 *num, I801_dev))) { 162 if(PCI_FUNC(I801_dev->devfn) != 3) 163 continue; 164 break; 165 } 166 num++; 167 } while (*num != 0); 168 169 if (I801_dev == NULL) { 170 printk 171 (KERN_WARNING "i2c-i801.o: Error: Can't detect I801, function 3!\n"); 172 error_return = -ENODEV; 173 goto END; 174 } 175 isich4 = *num == PCI_DEVICE_ID_INTEL_82801DB_SMBUS; 176 177 /* Determine the address of the SMBus areas */ 122 if(PCI_FUNC(dev->devfn) != 3) 123 return -ENODEV; 124 125 I801_dev = dev; 126 if (dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) 127 isich4 = 1; 128 else 129 isich4 = 0; 130 131 /* Determine the address of the SMBus areas */ 178 132 if (force_addr) { 179 133 i801_smba = force_addr & 0xfff0; … … 182 136 i801_smba &= 0xfff0; 183 137 if(i801_smba == 0) { 184 printk(KERN_ERR "i2c-i801.o: SMB base address uninitialized - upgrade BIOS or use force_addr=0xaddr\n"); 138 dev_err(dev, "SMB base address uninitialized" 139 "- upgrade BIOS or use force_addr=0xaddr\n"); 185 140 return -ENODEV; 186 141 } 187 142 } 188 143 189 if (check_region(i801_smba, (isich4 ? 16 : 8))) { 190 printk 191 (KERN_ERR "i2c-i801.o: I801_smb region 0x%x already in use!\n", 192 i801_smba); 193 error_return = -ENODEV; 144 if (!request_region(i801_smba, (isich4 ? 16 : 8), "i801-smbus")) { 145 dev_err(dev, "I801_smb region 0x%x already in use!\n", 146 i801_smba); 147 error_return = -EBUSY; 194 148 goto END; 195 149 } … … 198 152 temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ 199 153 pci_write_config_byte(I801_dev, SMBHSTCFG, temp); 200 /* If force_addr is set, we program the new address here. Just to make 201 sure, we disable the device first. */ 154 155 /* If force_addr is set, we program the new address here. Just to make 156 sure, we disable the device first. */ 202 157 if (force_addr) { 203 158 pci_write_config_byte(I801_dev, SMBHSTCFG, temp & 0xfe); 204 159 pci_write_config_word(I801_dev, SMBBA, i801_smba); 205 160 pci_write_config_byte(I801_dev, SMBHSTCFG, temp | 0x01); 206 printk 207 (KERN_WARNING "i2c-i801.o: WARNING: I801 SMBus interface set to new " 208 "address %04x!\n", i801_smba); 161 dev_warn(dev, "WARNING: I801 SMBus interface set to " 162 "new address %04x!\n", i801_smba); 209 163 } else if ((temp & 1) == 0) { 210 164 pci_write_config_byte(I801_dev, SMBHSTCFG, temp | 1); 211 printk(KERN_WARNING "i2c-i801.o: enabling SMBus device\n"); 212 } 213 214 request_region(i801_smba, (isich4 ? 16 : 8), "i801-smbus"); 215 216 #ifdef DEBUG 165 dev_warn(dev, "enabling SMBus device\n"); 166 } 167 217 168 if (temp & 0x02) 218 printk 219 (KERN_DEBUG "i2c-i801.o: I801 using Interrupt SMI# for SMBus.\n"); 169 dev_dbg(dev, "I801 using Interrupt SMI# for SMBus.\n"); 220 170 else 221 printk 222 (KERN_DEBUG "i2c-i801.o: I801 using PCI Interrupt for SMBus.\n"); 171 dev_dbg(dev, "I801 using PCI Interrupt for SMBus.\n"); 223 172 224 173 pci_read_config_byte(I801_dev, SMBREV, &temp); 225 printk(KERN_DEBUG "i2c-i801.o: SMBREV = 0x%X\n", temp); 226 printk(KERN_DEBUG "i2c-i801.o: I801_smba = 0x%X\n", i801_smba); 227 #endif /* DEBUG */ 228 229 END: 174 dev_dbg(dev, "SMBREV = 0x%X\n", temp); 175 dev_dbg(dev, "I801_smba = 0x%X\n", i801_smba); 176 177 END: 230 178 return error_return; 231 179 } 232 180 233 181 234 void i801_do_pause(unsigned int amount)182 static void i801_do_pause(unsigned int amount) 235 183 { 236 184 current->state = TASK_INTERRUPTIBLE; … … 238 186 } 239 187 240 int i801_transaction(void)188 static int i801_transaction(void) 241 189 { 242 190 int temp; … … 244 192 int timeout = 0; 245 193 246 #ifdef DEBUG 247 printk 248 (KERN_DEBUG "i2c-i801.o: Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, " 249 "DAT1=%02x\n", inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), 250 inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1)); 251 #endif 194 dev_dbg(I801_dev, "Transaction (pre): CNT=%02x, CMD=%02x," 195 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 196 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 197 inb_p(SMBHSTDAT1)); 252 198 253 199 /* Make sure the SMBus host is ready to start transmitting */ 254 200 /* 0x1f = Failed, Bus_Err, Dev_Err, Intr, Host_Busy */ 255 201 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) { 256 #ifdef DEBUG 257 printk(KERN_DEBUG "i2c-i801.o: SMBus busy (%02x). Resetting... \n", 258 temp); 259 #endif 202 dev_dbg(I801_dev, "SMBus busy (%02x). Resetting... \n", 203 temp); 260 204 outb_p(temp, SMBHSTSTS); 261 205 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) { 262 #ifdef DEBUG 263 printk(KERN_DEBUG "i2c-i801.o: Failed! (%02x)\n", temp); 264 #endif 206 dev_dbg(I801_dev, "Failed! (%02x)\n", temp); 265 207 return -1; 266 208 } else { 267 #ifdef DEBUG 268 printk(KERN_DEBUG "i2c-i801.o: Successfull!\n"); 269 #endif 209 dev_dbg(I801_dev, "Successfull!\n"); 270 210 } 271 211 } … … 281 221 /* If the SMBus is still busy, we give up */ 282 222 if (timeout >= MAX_TIMEOUT) { 283 #ifdef DEBUG 284 printk(KERN_DEBUG "i2c-i801.o: SMBus Timeout!\n"); 223 dev_dbg(I801_dev, "SMBus Timeout!\n"); 285 224 result = -1; 286 #endif287 225 } 288 226 289 227 if (temp & 0x10) { 290 228 result = -1; 291 #ifdef DEBUG 292 printk(KERN_DEBUG "i2c-i801.o: Error: Failed bus transaction\n"); 293 #endif 229 dev_dbg(I801_dev, "Error: Failed bus transaction\n"); 294 230 } 295 231 296 232 if (temp & 0x08) { 297 233 result = -1; 298 printk 299 (KERN_ERR "i2c-i801.o: Bus collision! SMBus may be locked until next hard\n" 300 "reset. (sorry!)\n"); 234 dev_err(I801_dev, "Bus collision! SMBus may be locked " 235 "until next hard reset. (sorry!)\n"); 301 236 /* Clock stops and slave is stuck in mid-transmission */ 302 237 } … … 304 239 if (temp & 0x04) { 305 240 result = -1; 306 #ifdef DEBUG 307 printk(KERN_DEBUG "i2c-i801.o: Error: no response!\n"); 308 #endif 241 dev_dbg(I801_dev, "Error: no response!\n"); 309 242 } 310 243 … … 313 246 314 247 if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) { 315 #ifdef DEBUG 316 printk 317 (KERN_DEBUG "i2c-i801.o: Failed reset at end of transaction (%02x)\n", 318 temp); 319 #endif 320 } 321 #ifdef DEBUG 322 printk 323 (KERN_DEBUG "i2c-i801.o: Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, " 324 "DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), 325 inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1)); 326 #endif 248 dev_dbg(I801_dev, "Failed reset at end of transaction" 249 "(%02x)\n", temp); 250 } 251 dev_dbg(I801_dev, "Transaction (post): CNT=%02x, CMD=%02x, " 252 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 253 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 254 inb_p(SMBHSTDAT1)); 327 255 return result; 328 256 } 329 257 330 258 /* All-inclusive block transaction function */ 331 int i801_block_transaction(union i2c_smbus_data *data, char read_write, 332 int command)259 static int i801_block_transaction(union i2c_smbus_data *data, char read_write, 260 int command) 333 261 { 334 262 int i, len; … … 337 265 int result = 0; 338 266 int timeout; 339 unsigned char hostc, errmask;340 341 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {342 if (read_write == I2C_SMBUS_WRITE) {343 /* set I2C_EN bit in configuration register */344 pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc);345 pci_write_config_byte(I801_dev, SMBHSTCFG, 346 hostc | SMBHSTCFG_I2C_EN);347 } else {348 printk("i2c-i801.o: " 349 "I2C_SMBUS_I2C_BLOCK_READ not supported!\n");350 return -1;351 }352 }267 unsigned char hostc, errmask; 268 269 if (command == I2C_SMBUS_I2C_BLOCK_DATA) { 270 if (read_write == I2C_SMBUS_WRITE) { 271 /* set I2C_EN bit in configuration register */ 272 pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc); 273 pci_write_config_byte(I801_dev, SMBHSTCFG, 274 hostc | SMBHSTCFG_I2C_EN); 275 } else { 276 dev_err(I801_dev, 277 "I2C_SMBUS_I2C_BLOCK_READ not DB!\n"); 278 return -1; 279 } 280 } 353 281 354 282 if (read_write == I2C_SMBUS_WRITE) { … … 373 301 else 374 302 smbcmd = I801_BLOCK_DATA; 375 #if 0 /* now using HW PEC */376 if(isich4 && command == I2C_SMBUS_BLOCK_DATA_PEC)377 smbcmd |= I801_PEC_EN;378 #endif379 303 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT); 380 304 381 #ifdef DEBUG 382 printk 383 (KERN_DEBUG "i2c-i801.o: Block (pre %d): CNT=%02x, CMD=%02x, ADD=%02x, " 384 "DAT0=%02x, BLKDAT=%02x\n", i, inb_p(SMBHSTCNT), 385 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 386 inb_p(SMBBLKDAT)); 387 #endif 305 dev_dbg(I801_dev, "Block (pre %d): CNT=%02x, CMD=%02x, " 306 "ADD=%02x, DAT0=%02x, BLKDAT=%02x\n", i, 307 inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD), 308 inb_p(SMBHSTDAT0), inb_p(SMBBLKDAT)); 388 309 389 310 /* Make sure the SMBus host is ready to start transmitting */ 390 311 temp = inb_p(SMBHSTSTS); 391 if (i == 1) {392 /* Erronenous conditions before transaction:393 * Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */394 errmask=0x9f;395 } else {396 /* Erronenous conditions during transaction:397 * Failed, Bus_Err, Dev_Err, Intr */398 errmask=0x1e;399 }312 if (i == 1) { 313 /* Erronenous conditions before transaction: 314 * Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */ 315 errmask=0x9f; 316 } else { 317 /* Erronenous conditions during transaction: 318 * Failed, Bus_Err, Dev_Err, Intr */ 319 errmask=0x1e; 320 } 400 321 if (temp & errmask) { 401 #ifdef DEBUG 402 printk 403 (KERN_DEBUG "i2c-i801.o: SMBus busy (%02x). Resetting... \n", 404 temp); 405 #endif 322 dev_dbg(I801_dev, "SMBus busy (%02x). " 323 "Resetting... \n", temp); 406 324 outb_p(temp, SMBHSTSTS); 407 325 if (((temp = inb_p(SMBHSTSTS)) & errmask) != 0x00) { 408 printk 409 (KERN_ERR "i2c-i801.o: Reset failed! (%02x)\n", 410 temp); 326 dev_err(I801_dev, 327 "Reset failed! (%02x)\n", temp); 411 328 result = -1; 412 329 goto END; 413 330 } 414 331 if (i != 1) { 415 result = -1; /* if die in middle of block transaction, fail */ 416 goto END; 417 } 418 } 419 420 if (i == 1) { 421 #if 0 /* #ifdef HAVE_PEC (now using HW PEC) */ 422 if(isich4 && command == I2C_SMBUS_BLOCK_DATA_PEC) { 423 if(read_write == I2C_SMBUS_WRITE) 424 outb_p(data->block[len + 1], SMBPEC); 332 /* if die in middle of block transaction, fail */ 333 result = -1; 334 goto END; 425 335 } 426 #endif 336 } 337 338 if (i == 1) 427 339 outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT); 428 }429 340 430 341 /* We will always wait for a fraction of a second! */ … … 440 351 if (timeout >= MAX_TIMEOUT) { 441 352 result = -1; 442 #ifdef DEBUG 443 printk(KERN_DEBUG "i2c-i801.o: SMBus Timeout!\n"); 444 #endif 353 dev_dbg(I801_dev, "SMBus Timeout!\n"); 445 354 } 446 355 447 356 if (temp & 0x10) { 448 357 result = -1; 449 #ifdef DEBUG 450 printk 451 (KERN_DEBUG "i2c-i801.o: Error: Failed bus transaction\n"); 452 #endif 358 dev_dbg(I801_dev, 359 "Error: Failed bus transaction\n"); 453 360 } else if (temp & 0x08) { 454 361 result = -1; 455 printk(KERN_ERR "i2c-i801.o:Bus collision!\n");362 dev_err(I801_dev, "Bus collision!\n"); 456 363 } else if (temp & 0x04) { 457 364 result = -1; 458 #ifdef DEBUG 459 printk(KERN_DEBUG "i2c-i801.o: Error: no response!\n"); 460 #endif 365 dev_dbg(I801_dev, "Error: no response!\n"); 461 366 } 462 367 … … 470 375 } 471 376 472 /* Retrieve/store value in SMBBLKDAT */377 /* Retrieve/store value in SMBBLKDAT */ 473 378 if (read_write == I2C_SMBUS_READ) 474 379 data->block[i] = inb_p(SMBBLKDAT); … … 478 383 outb_p(temp, SMBHSTSTS); /* signals SMBBLKDAT ready */ 479 384 480 #ifdef DEBUG481 385 if ((temp = (0x1e & inb_p(SMBHSTSTS))) != 0x00) { 482 printk 483 (KERN_DEBUG "i2c-i801.o: Bad status (%02x) at end of transaction\n", 484 temp); 485 } 486 printk 487 (KERN_DEBUG "i2c-i801.o: Block (post %d): CNT=%02x, CMD=%02x, ADD=%02x, " 488 "DAT0=%02x, BLKDAT=%02x\n", i, inb_p(SMBHSTCNT), 489 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 490 inb_p(SMBBLKDAT)); 491 #endif 386 dev_dbg(I801_dev, 387 "Bad status (%02x) at end of transaction\n", 388 temp); 389 } 390 dev_dbg(I801_dev, "Block (post %d): CNT=%02x, CMD=%02x, " 391 "ADD=%02x, DAT0=%02x, BLKDAT=%02x\n", i, 392 inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD), 393 inb_p(SMBHSTDAT0), inb_p(SMBBLKDAT)); 492 394 493 395 if (result < 0) … … 506 408 507 409 if (timeout >= MAX_TIMEOUT) { 508 printk(KERN_DEBUG "i2c-i801.o: PEC Timeout!\n"); 509 } 510 #if 0 /* now using HW PEC */ 511 if(read_write == I2C_SMBUS_READ) { 512 data->block[len + 1] = inb_p(SMBPEC); 513 } 410 dev_dbg(I801_dev, "PEC Timeout!\n"); 411 } 412 outb_p(temp, SMBHSTSTS); 413 } 514 414 #endif 515 outb_p(temp, SMBHSTSTS); 516 } 517 #endif 518 result = 0; 415 result = 0; 519 416 END: 520 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {521 /* restore saved configuration register value */417 if (command == I2C_SMBUS_I2C_BLOCK_DATA) { 418 /* restore saved configuration register value */ 522 419 pci_write_config_byte(I801_dev, SMBHSTCFG, hostc); 523 }420 } 524 421 return result; 525 422 } 526 423 527 424 /* Return -1 on error. */ 528 s 32 i801_access(struct i2c_adapter * adap, u16 addr, unsigned short flags,529 char read_write, u8 command, int size,530 union i2c_smbus_data * data)425 static s32 i801_access(struct i2c_adapter * adap, u16 addr, 426 unsigned short flags, char read_write, u8 command, 427 int size, union i2c_smbus_data * data) 531 428 { 532 429 int hwpec = 0; … … 584 481 case I2C_SMBUS_PROC_CALL: 585 482 default: 586 printk(KERN_ERR "i2c-i801.o:Unsupported transaction %d\n", size);483 dev_err(I801_dev, "Unsupported transaction %d\n", size); 587 484 return -1; 588 485 } … … 630 527 631 528 632 u32 i801_func(struct i2c_adapter *adapter)529 static u32 i801_func(struct i2c_adapter *adapter) 633 530 { 634 531 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | … … 652 549 static struct i2c_adapter i801_adapter = { 653 550 .owner = THIS_MODULE, 654 .name = "unset",655 551 .id = I2C_ALGO_SMBUS | I2C_HW_SMBUS_I801, 656 552 .algo = &smbus_algorithm, 553 .name = "unset", 657 554 }; 658 555 659 660 661 556 static struct pci_device_id i801_ids[] __devinitdata = { 557 { 558 .vendor = PCI_VENDOR_ID_INTEL, 559 .device = PCI_DEVICE_ID_INTEL_82801AA_3, 560 .subvendor = PCI_ANY_ID, 561 .subdevice = PCI_ANY_ID, 562 }, 563 { 564 .vendor = PCI_VENDOR_ID_INTEL, 565 .device = PCI_DEVICE_ID_INTEL_82801AB_3, 566 .subvendor = PCI_ANY_ID, 567 .subdevice = PCI_ANY_ID, 568 }, 569 { 570 .vendor = PCI_VENDOR_ID_INTEL, 571 .device = PCI_DEVICE_ID_INTEL_82801BA_2, 572 .subvendor = PCI_ANY_ID, 573 .subdevice = PCI_ANY_ID, 574 }, 575 { 576 .vendor = PCI_VENDOR_ID_INTEL, 577 .device = PCI_DEVICE_ID_INTEL_82801CA_3, 578 .subvendor = PCI_ANY_ID, 579 .subdevice = PCI_ANY_ID, 580 }, 581 { 582 .vendor = PCI_VENDOR_ID_INTEL, 583 .device = PCI_DEVICE_ID_INTEL_82801DB_3, 584 .subvendor = PCI_ANY_ID, 585 .subdevice = PCI_ANY_ID, 586 }, 662 587 { 0, } 663 588 }; … … 666 591 { 667 592 668 if (i801_setup( )) {669 printk670 (KERN_WARNING "i2c-i801.o:I801 not detected, module not inserted.\n");593 if (i801_setup(dev)) { 594 dev_warn(dev, 595 "I801 not detected, module not inserted.\n"); 671 596 return -ENODEV; 672 597 } 673 598 674 s printf(i801_adapter.name, "SMBus I801 adapter at %04x",675 i801_smba);676 i2c_add_adapter(&i801_adapter);599 snprintf(i801_adapter.name, 32, 600 "SMBus I801 adapter at %04x", i801_smba); 601 return i2c_add_adapter(&i801_adapter); 677 602 } 678 603 … … 691 616 static int __init i2c_i801_init(void) 692 617 { 693 printk(KERN_INFO "i2c-i801 .oversion %s (%s)\n", LM_VERSION, LM_DATE);618 printk(KERN_INFO "i2c-i801 version %s (%s)\n", LM_VERSION, LM_DATE); 694 619 return pci_module_init(&i801_driver); 695 620 } 696 697 621 698 622 static void __exit i2c_i801_exit(void) … … 702 626 } 703 627 704 705 706 MODULE_AUTHOR 707 ("Frodo Looijaard <frodol@dds.nl>, Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker <mdsxyz123@yahoo.com>"); 628 MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, " 629 "Philip Edelbrock <phil@netroedge.com>, " 630 "and Mark D. Studebaker <mdsxyz123@yahoo.com>"); 708 631 MODULE_DESCRIPTION("I801 SMBus driver"); 632 MODULE_LICENSE("GPL"); 709 633 710 634 module_init(i2c_i801_init);
