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Changeset 1209

Timestamp:

10/22/01 03:20:48 (12 years ago)

Author:

mds

Message:

Add 'init' parameter to control initialization.

Use 'init=0' to skip initialization, this should fix
those pesky PC's that crash when you load w83781d.

Location:

lm-sensors/trunk

Files:

: 4 modified

CHANGES (modified) (1 diff)
doc/chips/MODPARMS (modified) (2 diffs)
doc/chips/w83781d (modified) (1 diff)
kernel/chips/w83781d.c (modified) (4 diffs)

Legend:

: Unmodified
: Added
: Removed

lm-sensors/trunk/CHANGES

r1208	r1209
30	30	Module sis5595: Fix support for rev B0
31	31	Module via686a: Make limit initializations reliable
	32	Module w83781d: Allow init=0 parameter to bypass initialization
32	33	Program isadump: Add flat address space (PCI) support
33	34	Program mkpatch.pl: Add support for i2c-ali1535, adm1024, ds1621,

lm-sensors/trunk/doc/chips/MODPARMS

r1118	r1209
13	13	probe=bus,address
14	14	probe_range=bus,startaddress,endaddress
	15	init=[0,1] (default 1)
15	16
16	17	All arguments are in decimal unless prefixed by "0x".
…	…
89	90	This is required if the BIOS does not initialize the base address.
90	91
	92	`init' is used to tell a driver to bypass initializing a chip.
	93	This may be necessary if the BIOS has initialized the chip a certain way
	94	and the driver should not overwrite that initialization.
	95	The default is 1, so the only useful value is `init=0'.
	96	This parameter is not supported by most drivers.
	97
91	98	==================================
92	99	EXAMPLE

lm-sensors/trunk/doc/chips/w83781d

r1148	r1209
60	60	* probe_range: short array (min = 1, max = 48)
61	61	List of adapter,start-addr,end-addr triples to scan additionally
	62	* init=[0,1] (default 1)
	63	Use 'init=0' to bypass initializing the chip.
	64	Try this if your computer crashes when you load the module.
62	65
63	66

lm-sensors/trunk/kernel/chips/w83781d.c

r1201	r1209
71	71	/* Insmod parameters */
72	72	SENSORS_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
	73
	74	static int init = 1;
	75	MODULE_PARM(init, "i");
	76	MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
73	77
74	78	/* Many W83781D constants specified below */
…	…
1190	1194	u8 tmp;
1191	1195
1192		if(type != as99127f) { /* this resets registers we don't have
1193		documentation for on the as99127f */
	1196	if(init && type != as99127f) { /* this resets registers we don't have
	1197	documentation for on the as99127f */
1194	1198	/* save this register */
1195	1199	i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
…	…
1237	1241	*/
1238	1242
1239		if (type == w83781d) {
	1243	if (init && type == w83781d) {
1240	1244	u16 k = 0;
1241	1245	/*
…	…
1257	1261	#endif /* W83781D_RT */
1258	1262
1259		w83781d_write_value(client, W83781D_REG_IN_MIN(0),
1260		IN_TO_REG(W83781D_INIT_IN_MIN_0));
1261		w83781d_write_value(client, W83781D_REG_IN_MAX(0),
1262		IN_TO_REG(W83781D_INIT_IN_MAX_0));
1263		if (type != w83783s) {
1264		w83781d_write_value(client, W83781D_REG_IN_MIN(1),
1265		IN_TO_REG(W83781D_INIT_IN_MIN_1));
1266		w83781d_write_value(client, W83781D_REG_IN_MAX(1),
1267		IN_TO_REG(W83781D_INIT_IN_MAX_1));
1268		}
1269
1270		w83781d_write_value(client, W83781D_REG_IN_MIN(2),
1271		IN_TO_REG(W83781D_INIT_IN_MIN_2));
1272		w83781d_write_value(client, W83781D_REG_IN_MAX(2),
1273		IN_TO_REG(W83781D_INIT_IN_MAX_2));
1274		w83781d_write_value(client, W83781D_REG_IN_MIN(3),
1275		IN_TO_REG(W83781D_INIT_IN_MIN_3));
1276		w83781d_write_value(client, W83781D_REG_IN_MAX(3),
1277		IN_TO_REG(W83781D_INIT_IN_MAX_3));
1278		w83781d_write_value(client, W83781D_REG_IN_MIN(4),
1279		IN_TO_REG(W83781D_INIT_IN_MIN_4));
1280		w83781d_write_value(client, W83781D_REG_IN_MAX(4),
1281		IN_TO_REG(W83781D_INIT_IN_MAX_4));
1282		if (type == w83781d \|\| type == as99127f) {
1283		w83781d_write_value(client, W83781D_REG_IN_MIN(5),
1284		IN_TO_REG(W83781D_INIT_IN_MIN_5));
1285		w83781d_write_value(client, W83781D_REG_IN_MAX(5),
1286		IN_TO_REG(W83781D_INIT_IN_MAX_5));
1287		} else {
1288		w83781d_write_value(client, W83781D_REG_IN_MIN(5),
1289		IN_TO_REG(W83782D_INIT_IN_MIN_5));
1290		w83781d_write_value(client, W83781D_REG_IN_MAX(5),
1291		IN_TO_REG(W83782D_INIT_IN_MAX_5));
1292		}
1293		if (type == w83781d \|\| type == as99127f) {
1294		w83781d_write_value(client, W83781D_REG_IN_MIN(6),
1295		IN_TO_REG(W83781D_INIT_IN_MIN_6));
1296		w83781d_write_value(client, W83781D_REG_IN_MAX(6),
1297		IN_TO_REG(W83781D_INIT_IN_MAX_6));
1298		} else {
1299		w83781d_write_value(client, W83781D_REG_IN_MIN(6),
1300		IN_TO_REG(W83782D_INIT_IN_MIN_6));
1301		w83781d_write_value(client, W83781D_REG_IN_MAX(6),
1302		IN_TO_REG(W83782D_INIT_IN_MAX_6));
1303		}
1304		if ((type == w83782d) \|\| (type == w83627hf)) {
1305		w83781d_write_value(client, W83781D_REG_IN_MIN(7),
1306		IN_TO_REG(W83781D_INIT_IN_MIN_7));
1307		w83781d_write_value(client, W83781D_REG_IN_MAX(7),
1308		IN_TO_REG(W83781D_INIT_IN_MAX_7));
1309		w83781d_write_value(client, W83781D_REG_IN_MIN(8),
1310		IN_TO_REG(W83781D_INIT_IN_MIN_8));
1311		w83781d_write_value(client, W83781D_REG_IN_MAX(8),
1312		IN_TO_REG(W83781D_INIT_IN_MAX_8));
1313		w83781d_write_value(client, W83781D_REG_VBAT,
1314		(w83781d_read_value(client, W83781D_REG_VBAT) \| 0x01));
1315		}
1316		w83781d_write_value(client, W83781D_REG_FAN_MIN(1),
1317		FAN_TO_REG(W83781D_INIT_FAN_MIN_1, 2));
1318		w83781d_write_value(client, W83781D_REG_FAN_MIN(2),
1319		FAN_TO_REG(W83781D_INIT_FAN_MIN_2, 2));
1320		w83781d_write_value(client, W83781D_REG_FAN_MIN(3),
1321		FAN_TO_REG(W83781D_INIT_FAN_MIN_3, 2));
1322
1323		w83781d_write_value(client, W83781D_REG_TEMP_OVER,
1324		TEMP_TO_REG(W83781D_INIT_TEMP_OVER));
1325		w83781d_write_value(client, W83781D_REG_TEMP_HYST,
1326		TEMP_TO_REG(W83781D_INIT_TEMP_HYST));
1327
1328		if (type == as99127f) {
1329		w83781d_write_value(client, W83781D_REG_TEMP2_OVER,
1330		AS99127_TEMP_ADD_TO_REG
1331		(W83781D_INIT_TEMP2_OVER));
1332		w83781d_write_value(client, W83781D_REG_TEMP2_HYST,
1333		AS99127_TEMP_ADD_TO_REG
1334		(W83781D_INIT_TEMP2_HYST));
1335		} else {
1336		w83781d_write_value(client, W83781D_REG_TEMP2_OVER,
1337		TEMP_ADD_TO_REG
1338		(W83781D_INIT_TEMP2_OVER));
1339		w83781d_write_value(client, W83781D_REG_TEMP2_HYST,
1340		TEMP_ADD_TO_REG
1341		(W83781D_INIT_TEMP2_HYST));
1342		}
1343		w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, 0x00);
1344
1345		if (type == as99127f) {
1346		w83781d_write_value(client, W83781D_REG_TEMP3_OVER,
1347		AS99127_TEMP_ADD_TO_REG
1348		(W83781D_INIT_TEMP3_OVER));
1349		w83781d_write_value(client, W83781D_REG_TEMP3_HYST,
1350		AS99127_TEMP_ADD_TO_REG
1351		(W83781D_INIT_TEMP3_HYST));
1352		} else if (type != w83783s) {
1353		w83781d_write_value(client, W83781D_REG_TEMP3_OVER,
1354		TEMP_ADD_TO_REG
1355		(W83781D_INIT_TEMP3_OVER));
1356		w83781d_write_value(client, W83781D_REG_TEMP3_HYST,
1357		TEMP_ADD_TO_REG
1358		(W83781D_INIT_TEMP3_HYST));
1359		}
1360		if (type != w83783s) {
1361		w83781d_write_value(client, W83781D_REG_TEMP3_CONFIG,
1362		0x00);
1363		}
1364		/* enable PWM2 control (can't hurt since PWM reg should have been
1365		reset to 0xff) */
1366		if (type != w83781d) {
1367		w83781d_write_value(client, W83781D_REG_PWMCLK12, 0x19);
	1263	if(init) {
	1264	w83781d_write_value(client, W83781D_REG_IN_MIN(0),
	1265	IN_TO_REG(W83781D_INIT_IN_MIN_0));
	1266	w83781d_write_value(client, W83781D_REG_IN_MAX(0),
	1267	IN_TO_REG(W83781D_INIT_IN_MAX_0));
	1268	if (type != w83783s) {
	1269	w83781d_write_value(client, W83781D_REG_IN_MIN(1),
	1270	IN_TO_REG(W83781D_INIT_IN_MIN_1));
	1271	w83781d_write_value(client, W83781D_REG_IN_MAX(1),
	1272	IN_TO_REG(W83781D_INIT_IN_MAX_1));
	1273	}
	1274
	1275	w83781d_write_value(client, W83781D_REG_IN_MIN(2),
	1276	IN_TO_REG(W83781D_INIT_IN_MIN_2));
	1277	w83781d_write_value(client, W83781D_REG_IN_MAX(2),
	1278	IN_TO_REG(W83781D_INIT_IN_MAX_2));
	1279	w83781d_write_value(client, W83781D_REG_IN_MIN(3),
	1280	IN_TO_REG(W83781D_INIT_IN_MIN_3));
	1281	w83781d_write_value(client, W83781D_REG_IN_MAX(3),
	1282	IN_TO_REG(W83781D_INIT_IN_MAX_3));
	1283	w83781d_write_value(client, W83781D_REG_IN_MIN(4),
	1284	IN_TO_REG(W83781D_INIT_IN_MIN_4));
	1285	w83781d_write_value(client, W83781D_REG_IN_MAX(4),
	1286	IN_TO_REG(W83781D_INIT_IN_MAX_4));
	1287	if (type == w83781d \|\| type == as99127f) {
	1288	w83781d_write_value(client, W83781D_REG_IN_MIN(5),
	1289	IN_TO_REG(W83781D_INIT_IN_MIN_5));
	1290	w83781d_write_value(client, W83781D_REG_IN_MAX(5),
	1291	IN_TO_REG(W83781D_INIT_IN_MAX_5));
	1292	} else {
	1293	w83781d_write_value(client, W83781D_REG_IN_MIN(5),
	1294	IN_TO_REG(W83782D_INIT_IN_MIN_5));
	1295	w83781d_write_value(client, W83781D_REG_IN_MAX(5),
	1296	IN_TO_REG(W83782D_INIT_IN_MAX_5));
	1297	}
	1298	if (type == w83781d \|\| type == as99127f) {
	1299	w83781d_write_value(client, W83781D_REG_IN_MIN(6),
	1300	IN_TO_REG(W83781D_INIT_IN_MIN_6));
	1301	w83781d_write_value(client, W83781D_REG_IN_MAX(6),
	1302	IN_TO_REG(W83781D_INIT_IN_MAX_6));
	1303	} else {
	1304	w83781d_write_value(client, W83781D_REG_IN_MIN(6),
	1305	IN_TO_REG(W83782D_INIT_IN_MIN_6));
	1306	w83781d_write_value(client, W83781D_REG_IN_MAX(6),
	1307	IN_TO_REG(W83782D_INIT_IN_MAX_6));
	1308	}
	1309	if ((type == w83782d) \|\| (type == w83627hf)) {
	1310	w83781d_write_value(client, W83781D_REG_IN_MIN(7),
	1311	IN_TO_REG(W83781D_INIT_IN_MIN_7));
	1312	w83781d_write_value(client, W83781D_REG_IN_MAX(7),
	1313	IN_TO_REG(W83781D_INIT_IN_MAX_7));
	1314	w83781d_write_value(client, W83781D_REG_IN_MIN(8),
	1315	IN_TO_REG(W83781D_INIT_IN_MIN_8));
	1316	w83781d_write_value(client, W83781D_REG_IN_MAX(8),
	1317	IN_TO_REG(W83781D_INIT_IN_MAX_8));
	1318	w83781d_write_value(client, W83781D_REG_VBAT,
	1319	(w83781d_read_value(client, W83781D_REG_VBAT) \| 0x01));
	1320	}
	1321	w83781d_write_value(client, W83781D_REG_FAN_MIN(1),
	1322	FAN_TO_REG(W83781D_INIT_FAN_MIN_1, 2));
	1323	w83781d_write_value(client, W83781D_REG_FAN_MIN(2),
	1324	FAN_TO_REG(W83781D_INIT_FAN_MIN_2, 2));
	1325	w83781d_write_value(client, W83781D_REG_FAN_MIN(3),
	1326	FAN_TO_REG(W83781D_INIT_FAN_MIN_3, 2));
	1327
	1328	w83781d_write_value(client, W83781D_REG_TEMP_OVER,
	1329	TEMP_TO_REG(W83781D_INIT_TEMP_OVER));
	1330	w83781d_write_value(client, W83781D_REG_TEMP_HYST,
	1331	TEMP_TO_REG(W83781D_INIT_TEMP_HYST));
	1332
	1333	if (type == as99127f) {
	1334	w83781d_write_value(client, W83781D_REG_TEMP2_OVER,
	1335	AS99127_TEMP_ADD_TO_REG
	1336	(W83781D_INIT_TEMP2_OVER));
	1337	w83781d_write_value(client, W83781D_REG_TEMP2_HYST,
	1338	AS99127_TEMP_ADD_TO_REG
	1339	(W83781D_INIT_TEMP2_HYST));
	1340	} else {
	1341	w83781d_write_value(client, W83781D_REG_TEMP2_OVER,
	1342	TEMP_ADD_TO_REG
	1343	(W83781D_INIT_TEMP2_OVER));
	1344	w83781d_write_value(client, W83781D_REG_TEMP2_HYST,
	1345	TEMP_ADD_TO_REG
	1346	(W83781D_INIT_TEMP2_HYST));
	1347	}
	1348	w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, 0x00);
	1349
	1350	if (type == as99127f) {
	1351	w83781d_write_value(client, W83781D_REG_TEMP3_OVER,
	1352	AS99127_TEMP_ADD_TO_REG
	1353	(W83781D_INIT_TEMP3_OVER));
	1354	w83781d_write_value(client, W83781D_REG_TEMP3_HYST,
	1355	AS99127_TEMP_ADD_TO_REG
	1356	(W83781D_INIT_TEMP3_HYST));
	1357	} else if (type != w83783s) {
	1358	w83781d_write_value(client, W83781D_REG_TEMP3_OVER,
	1359	TEMP_ADD_TO_REG
	1360	(W83781D_INIT_TEMP3_OVER));
	1361	w83781d_write_value(client, W83781D_REG_TEMP3_HYST,
	1362	TEMP_ADD_TO_REG
	1363	(W83781D_INIT_TEMP3_HYST));
	1364	}
	1365	if (type != w83783s) {
	1366	w83781d_write_value(client, W83781D_REG_TEMP3_CONFIG,
	1367	0x00);
	1368	}
	1369	/* enable PWM2 control (can't hurt since PWM reg should have
	1370	been reset to 0xff) */
	1371	if (type != w83781d) {
	1372	w83781d_write_value(client, W83781D_REG_PWMCLK12, 0x19);
	1373	}
1368	1374	}
1369	1375

Context Navigation

Changeset 1209

Legend:

lm-sensors/trunk/CHANGES

lm-sensors/trunk/doc/chips/MODPARMS

lm-sensors/trunk/doc/chips/w83781d

lm-sensors/trunk/kernel/chips/w83781d.c

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