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w83781d.c @ 3260

Revision 3260, 65.9 KB (checked in by khali, 7 years ago)
Use real-time alarm registers instead of interrupt registers for W83782D, W83627HF, W83783S and W83791D. This is a backport from Linux 2.6.
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1	/*
2	w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3	monitoring
4	Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5	Philip Edelbrock <phil@netroedge.com>,
6	and Mark Studebaker <mdsxyz123@yahoo.com>
7
8	This program is free software; you can redistribute it and/or modify
9	it under the terms of the GNU General Public License as published by
10	the Free Software Foundation; either version 2 of the License, or
11	(at your option) any later version.
12
13	This program is distributed in the hope that it will be useful,
14	but WITHOUT ANY WARRANTY; without even the implied warranty of
15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16	GNU General Public License for more details.
17
18	You should have received a copy of the GNU General Public License
19	along with this program; if not, write to the Free Software
20	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21	*/
22
23	/*
24	Supports following chips:
25
26	Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27	as99127f 7 3 0 3 0x31 0x12c3 yes no
28	as99127f rev.2 (type name = as99127f) 0x31 0x5ca3 yes no
29	w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
30	w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31	w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32	w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
33	w83791d 10 5 5 3 0x71 0x5ca3 yes no
34
35	*/
36
37	#include <linux/module.h>
38	#include <linux/slab.h>
39	#include <linux/ioport.h>
40	#include <linux/i2c.h>
41	#include <linux/i2c-proc.h>
42	#include <linux/init.h>
43	#include <asm/io.h>
44	#include "version.h"
45	#include "sensors_vid.h"
46	#include "lm75.h"
47
48	/* RT Table support #defined so we can take it out if it gets bothersome */
49	#define W83781D_RT 1
50
51	/* Addresses to scan */
52	static unsigned short normal_i2c[] = { SENSORS_I2C_END };
53	static unsigned short normal_i2c_range[] = { 0x20, 0x2f, SENSORS_I2C_END };
54	static unsigned int normal_isa[] = { 0x0290, SENSORS_ISA_END };
55	static unsigned int normal_isa_range[] = { SENSORS_ISA_END };
56
57	/* Insmod parameters */
58	SENSORS_INSMOD_6(w83781d, w83782d, w83783s, w83627hf, as99127f, w83791d);
59	SENSORS_MODULE_PARM(force_subclients, "List of subclient addresses: " \
60	"{bus, clientaddr, subclientaddr1, subclientaddr2}");
61
62	static int init = 1;
63	MODULE_PARM(init, "i");
64	MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
65
66	/* Constants specified below */
67
68	/* Length of ISA address segment */
69	#define W83781D_EXTENT 8
70
71	/* Where are the ISA address/data registers relative to the base address */
72	#define W83781D_ADDR_REG_OFFSET 5
73	#define W83781D_DATA_REG_OFFSET 6
74
75	/* The W83781D registers */
76	/* The W83782D registers for nr=7,8 are in bank 5 */
77	#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
78	(0x554 + (((nr) - 7) * 2)))
79	#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
80	(0x555 + (((nr) - 7) * 2)))
81	#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
82	(0x550 + (nr) - 7))
83
84	#define W83791D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
85	(0xb4 + (((nr) - 7) * 2)))
86	#define W83791D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
87	(0xb5 + (((nr) - 7) * 2)))
88	#define W83791D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
89	(0xb0 + (nr) - 7))
90
91	#define W83781D_REG_FAN_MIN(nr) ((nr < 4) ? (0x3a + (nr)) : \
92	(0xba + (nr) - 4))
93	#define W83781D_REG_FAN(nr) ((nr < 4) ? (0x27 + (nr)) : \
94	(0xbc + (nr) - 4))
95
96	#define W83781D_REG_TEMP2 0x0150
97	#define W83781D_REG_TEMP3 0x0250
98	#define W83781D_REG_TEMP2_HYST 0x153
99	#define W83781D_REG_TEMP3_HYST 0x253
100	#define W83781D_REG_TEMP2_CONFIG 0x152
101	#define W83781D_REG_TEMP3_CONFIG 0x252
102	#define W83781D_REG_TEMP2_OVER 0x155
103	#define W83781D_REG_TEMP3_OVER 0x255
104
105	#define W83781D_REG_TEMP 0x27
106	#define W83781D_REG_TEMP_OVER 0x39
107	#define W83781D_REG_TEMP_HYST 0x3A
108	#define W83781D_REG_BANK 0x4E
109
110	#define W83781D_REG_CONFIG 0x40
111
112	/* Interrupt status (W83781D, AS99127F) */
113	#define W83781D_REG_ALARM1 0x41
114	#define W83781D_REG_ALARM2 0x42
115
116	/* Real-time status (W83782D, W83783S, W83627HF) */
117	#define W83782D_REG_ALARM1 0x459
118	#define W83782D_REG_ALARM2 0x45A
119	#define W83782D_REG_ALARM3 0x45B
120
121	/* Real-time status (W83791D) */
122	#define W83791D_REG_ALARM1 0xA9
123	#define W83791D_REG_ALARM2 0xAA
124	#define W83791D_REG_ALARM3 0xAB
125
126	#define W83781D_REG_BEEP_CONFIG 0x4D
127	#define W83781D_REG_BEEP_INTS1 0x56
128	#define W83781D_REG_BEEP_INTS2 0x57
129	#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
130
131	#define W83781D_REG_VID_FANDIV 0x47
132
133	#define W83781D_REG_CHIPID 0x49
134	#define W83781D_REG_WCHIPID 0x58
135	#define W83781D_REG_CHIPMAN 0x4F
136	#define W83781D_REG_PIN 0x4B
137
138	/* 782D/783S only */
139	#define W83781D_REG_VBAT 0x5D
140
141	/* PWM 782D (1-4) and 783S (1-2) only */
142	#define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
143	/* on which is which; */
144	#define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
145	/* However 782d is probably wrong. */
146	#define W83781D_REG_PWM3 0x5E
147	#define W83781D_REG_PWM4 0x5F
148	#define W83781D_REG_PWMCLK12 0x5C
149	#define W83781D_REG_PWMCLK34 0x45C
150
151	#define W83791D_REG_PWM1 0x81
152	#define W83791D_REG_PWM2 0x83
153	#define W83791D_REG_PWM3 0x94
154
155	#define W83627HF_REG_PWM1 0x01
156	#define W83627HF_REG_PWM2 0x03
157	#define W83627HF_REG_PWMCLK1 0x00
158	#define W83627HF_REG_PWMCLK2 0x02
159
160	static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
161	W83781D_REG_PWM3, W83781D_REG_PWM4
162	};
163
164	static const u8 regpwm_w83791d[] = { W83791D_REG_PWM1, W83791D_REG_PWM2,
165	W83791D_REG_PWM3
166	};
167
168	#define W83781D_REG_PWM(type, nr) (((type) == w83791d) ? \
169	regpwm_w83791d[(nr) - 1] : \
170	regpwm[(nr) - 1])
171
172	#define W83781D_REG_I2C_ADDR 0x48
173	#define W83781D_REG_I2C_SUBADDR 0x4A
174
175	/* The following are undocumented in the data sheets however we
176	received the information in an email from Winbond tech support */
177	/* Sensor selection - not on 781d */
178	#define W83781D_REG_SCFG1 0x5D
179	static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
180	#define W83781D_REG_SCFG2 0x59
181	static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
182	#define W83781D_DEFAULT_BETA 3435
183
184	/* RT Table registers */
185	#define W83781D_REG_RT_IDX 0x50
186	#define W83781D_REG_RT_VAL 0x51
187
188	/* Conversions. Rounding and limit checking is only done on the TO_REG
189	variants. Note that you should be a bit careful with which arguments
190	these macros are called: arguments may be evaluated more than once.
191	Fixing this is just not worth it. */
192	#define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
193	#define IN_FROM_REG(val) (((val) * 16 + 5) / 10)
194
195	static inline u8 FAN_TO_REG(long rpm, int div)
196	{
197	if (rpm == 0)
198	return 255;
199	rpm = SENSORS_LIMIT(rpm, 1, 1000000);
200	return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
201	254);
202	}
203
204	#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
205
206	#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-5)/10):\
207	((val)+5)/10),0,255))
208	#define TEMP_FROM_REG(val) (((val)>0x80?(val)-0x100:(val))*10)
209
210	#define ALARMS_FROM_REG(val) (val)
211	#define PWM_FROM_REG(val) (val)
212	#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
213	#define BEEPS_FROM_REG(val,type) ((type)==as99127f?(val)^0x7FFF:(val))
214	#define BEEPS_TO_REG(val,type) ((type)==as99127f?(~(val))&0x7FFF:(val)&0xffffff)
215
216	#define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
217	#define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
218
219	#define DIV_FROM_REG(val) (1 << (val))
220
221	static inline u8 DIV_TO_REG(long val, enum chips type)
222	{
223	int i;
224	val = SENSORS_LIMIT(val, 1,
225	((type == w83781d \|\| type == as99127f) ? 8 : 128)) >> 1;
226	for (i = 0; i < 7; i++) {
227	if (val == 0)
228	break;
229	val >>= 1;
230	}
231	return ((u8) i);
232	}
233
234	/* There are some complications in a module like this. First off, W83781D chips
235	may be both present on the SMBus and the ISA bus, and we have to handle
236	those cases separately at some places. Second, there might be several
237	W83781D chips available (well, actually, that is probably never done; but
238	it is a clean illustration of how to handle a case like that). Finally,
239	a specific chip may be attached to both ISA and SMBus, and we would
240	not like to detect it double. Fortunately, in the case of the W83781D at
241	least, a register tells us what SMBus address we are on, so that helps
242	a bit - except if there could be more than one SMBus. Groan. No solution
243	for this yet. */
244
245	/* This module may seem overly long and complicated. In fact, it is not so
246	bad. Quite a lot of bookkeeping is done. A real driver can often cut
247	some corners. */
248
249	/* For each registered W83781D, we need to keep some data in memory. That
250	data is pointed to by w83781d_list[NR]->data. The structure itself is
251	dynamically allocated, at the same time when a new w83781d client is
252	allocated. */
253	struct w83781d_data {
254	struct i2c_client client;
255	struct semaphore lock;
256	int sysctl_id;
257	enum chips type;
258
259	struct semaphore update_lock;
260	char valid; /* !=0 if following fields are valid */
261	unsigned long last_updated; /* In jiffies */
262
263	struct i2c_client lm75; / for secondary I2C addresses */
264	/* pointer to array of 2 subclients */
265
266	u8 in[10]; /* Register value - 8 & 9 for 782D and 791D only 10 for 791D */
267	u8 in_max[10]; /* Register value - 8 & 9 for 782D and 791D only 10 for 791D */
268	u8 in_min[10]; /* Register value - 8 & 9 for 782D and 791D only 10 for 791D */
269	u8 fan[5]; /* Register value - 4 & 5 for 791D only */
270	u8 fan_min[5]; /* Register value - 4 & 5 for 791D only */
271	u8 temp;
272	u8 temp_over; /* Register value */
273	u8 temp_hyst; /* Register value */
274	u16 temp_add[2]; /* Register value */
275	u16 temp_add_over[2]; /* Register value */
276	u16 temp_add_hyst[2]; /* Register value */
277	u8 fan_div[3]; /* Register encoding, shifted right */
278	u8 vid; /* Register encoding, combined */
279	u32 alarms; /* Register encoding, combined */
280	u32 beeps; /* Register encoding, combined */
281	u8 beep_enable; /* Boolean */
282	u8 pwm[4]; /* Register value */
283	u8 pwmenable[4]; /* bool */
284	u16 sens[3]; /* 782D/783S only.
285	1 = pentium diode; 2 = 3904 diode;
286	3000-5000 = thermistor beta.
287	Default = 3435.
288	Other Betas unimplemented */
289	#ifdef W83781D_RT
290	u8 rt[3][32]; /* Register value */
291	#endif
292	u8 vrm;
293	};
294
295
296	static int w83781d_attach_adapter(struct i2c_adapter *adapter);
297	static int w83781d_detect(struct i2c_adapter *adapter, int address,
298	unsigned short flags, int kind);
299	static int w83781d_detach_client(struct i2c_client *client);
300
301	static int w83781d_read_value(struct i2c_client *client, u16 register);
302	static int w83781d_write_value(struct i2c_client *client, u16 register,
303	u16 value);
304	static void w83781d_update_client(struct i2c_client *client);
305	static void w83781d_init_client(struct i2c_client *client);
306
307
308	static void w83781d_in(struct i2c_client *client, int operation,
309	int ctl_name, int nrels_mag, long results);
310	static void w83781d_fan(struct i2c_client *client, int operation,
311	int ctl_name, int nrels_mag, long results);
312	static void w83781d_temp(struct i2c_client *client, int operation,
313	int ctl_name, int nrels_mag, long results);
314	static void w83781d_temp_add(struct i2c_client *client, int operation,
315	int ctl_name, int nrels_mag, long results);
316	static void w83781d_vid(struct i2c_client *client, int operation,
317	int ctl_name, int nrels_mag, long results);
318	static void w83781d_vrm(struct i2c_client *client, int operation,
319	int ctl_name, int nrels_mag, long results);
320	static void w83781d_alarms(struct i2c_client *client, int operation,
321	int ctl_name, int nrels_mag, long results);
322	static void w83781d_beep(struct i2c_client *client, int operation,
323	int ctl_name, int nrels_mag, long results);
324	static void w83781d_fan_div(struct i2c_client *client, int operation,
325	int ctl_name, int nrels_mag, long results);
326	static void w83781d_pwm(struct i2c_client *client, int operation,
327	int ctl_name, int nrels_mag, long results);
328	static void w83781d_sens(struct i2c_client *client, int operation,
329	int ctl_name, int nrels_mag, long results);
330	#ifdef W83781D_RT
331	static void w83781d_rt(struct i2c_client *client, int operation,
332	int ctl_name, int nrels_mag, long results);
333	#endif
334
335	static struct i2c_driver w83781d_driver = {
336	.name = "W83781D sensor driver",
337	.id = I2C_DRIVERID_W83781D,
338	.flags = I2C_DF_NOTIFY,
339	.attach_adapter = w83781d_attach_adapter,
340	.detach_client = w83781d_detach_client,
341	};
342
343	/* The /proc/sys entries */
344	/* -- SENSORS SYSCTL START -- */
345
346	#define W83781D_SYSCTL_IN0 1000 /* Volts * 100 */
347	#define W83781D_SYSCTL_IN1 1001
348	#define W83781D_SYSCTL_IN2 1002
349	#define W83781D_SYSCTL_IN3 1003
350	#define W83781D_SYSCTL_IN4 1004
351	#define W83781D_SYSCTL_IN5 1005
352	#define W83781D_SYSCTL_IN6 1006
353	#define W83781D_SYSCTL_IN7 1007
354	#define W83781D_SYSCTL_IN8 1008
355	#define W83781D_SYSCTL_IN9 1009
356	#define W83781D_SYSCTL_FAN1 1101 /* Rotations/min */
357	#define W83781D_SYSCTL_FAN2 1102
358	#define W83781D_SYSCTL_FAN3 1103
359	#define W83781D_SYSCTL_FAN4 1104
360	#define W83781D_SYSCTL_FAN5 1105
361
362	#define W83781D_SYSCTL_TEMP1 1200 /* Degrees Celsius * 10 */
363	#define W83781D_SYSCTL_TEMP2 1201 /* Degrees Celsius * 10 */
364	#define W83781D_SYSCTL_TEMP3 1202 /* Degrees Celsius * 10 */
365	#define W83781D_SYSCTL_VID 1300 /* Volts * 1000 */
366	#define W83781D_SYSCTL_VRM 1301
367	#define W83781D_SYSCTL_PWM1 1401
368	#define W83781D_SYSCTL_PWM2 1402
369	#define W83781D_SYSCTL_PWM3 1403
370	#define W83781D_SYSCTL_PWM4 1404
371	#define W83781D_SYSCTL_SENS1 1501 /* 1, 2, or Beta (3000-5000) */
372	#define W83781D_SYSCTL_SENS2 1502
373	#define W83781D_SYSCTL_SENS3 1503
374	#define W83781D_SYSCTL_RT1 1601 /* 32-entry table */
375	#define W83781D_SYSCTL_RT2 1602 /* 32-entry table */
376	#define W83781D_SYSCTL_RT3 1603 /* 32-entry table */
377	#define W83781D_SYSCTL_FAN_DIV 2000 /* 1, 2, 4 or 8 */
378	#define W83781D_SYSCTL_ALARMS 2001 /* bitvector */
379	#define W83781D_SYSCTL_BEEP 2002 /* bitvector */
380
381	#define W83781D_ALARM_IN0 0x0001
382	#define W83781D_ALARM_IN1 0x0002
383	#define W83781D_ALARM_IN2 0x0004
384	#define W83781D_ALARM_IN3 0x0008
385	#define W83781D_ALARM_IN4 0x0100
386	#define W83781D_ALARM_IN5 0x0200
387	#define W83781D_ALARM_IN6 0x0400
388	#define W83782D_ALARM_IN7 0x10000
389	#define W83782D_ALARM_IN8 0x20000
390	#define W83781D_ALARM_FAN1 0x0040
391	#define W83781D_ALARM_FAN2 0x0080
392	#define W83781D_ALARM_FAN3 0x0800
393	#define W83781D_ALARM_TEMP1 0x0010
394	#define W83781D_ALARM_TEMP23 0x0020 /* 781D only */
395	#define W83781D_ALARM_TEMP2 0x0020 /* 782D/783S */
396	#define W83781D_ALARM_TEMP3 0x2000 /* 782D only */
397	#define W83781D_ALARM_CHAS 0x1000
398
399	/* -- SENSORS SYSCTL END -- */
400
401	/* These files are created for each detected chip. This is just a template;
402	though at first sight, you might think we could use a statically
403	allocated list, we need some way to get back to the parent - which
404	is done through one of the 'extra' fields which are initialized
405	when a new copy is allocated. */
406
407	/* just a guess - no datasheet */
408	static ctl_table as99127f_dir_table_template[] = {
409	{W83781D_SYSCTL_IN0, "in0", NULL, 0, 0644, NULL, &i2c_proc_real,
410	&i2c_sysctl_real, NULL, &w83781d_in},
411	{W83781D_SYSCTL_IN1, "in1", NULL, 0, 0644, NULL, &i2c_proc_real,
412	&i2c_sysctl_real, NULL, &w83781d_in},
413	{W83781D_SYSCTL_IN2, "in2", NULL, 0, 0644, NULL, &i2c_proc_real,
414	&i2c_sysctl_real, NULL, &w83781d_in},
415	{W83781D_SYSCTL_IN3, "in3", NULL, 0, 0644, NULL, &i2c_proc_real,
416	&i2c_sysctl_real, NULL, &w83781d_in},
417	{W83781D_SYSCTL_IN4, "in4", NULL, 0, 0644, NULL, &i2c_proc_real,
418	&i2c_sysctl_real, NULL, &w83781d_in},
419	{W83781D_SYSCTL_IN5, "in5", NULL, 0, 0644, NULL, &i2c_proc_real,
420	&i2c_sysctl_real, NULL, &w83781d_in},
421	{W83781D_SYSCTL_IN6, "in6", NULL, 0, 0644, NULL, &i2c_proc_real,
422	&i2c_sysctl_real, NULL, &w83781d_in},
423	{W83781D_SYSCTL_FAN1, "fan1", NULL, 0, 0644, NULL, &i2c_proc_real,
424	&i2c_sysctl_real, NULL, &w83781d_fan},
425	{W83781D_SYSCTL_FAN2, "fan2", NULL, 0, 0644, NULL, &i2c_proc_real,
426	&i2c_sysctl_real, NULL, &w83781d_fan},
427	{W83781D_SYSCTL_FAN3, "fan3", NULL, 0, 0644, NULL, &i2c_proc_real,
428	&i2c_sysctl_real, NULL, &w83781d_fan},
429	{W83781D_SYSCTL_TEMP1, "temp1", NULL, 0, 0644, NULL, &i2c_proc_real,
430	&i2c_sysctl_real, NULL, &w83781d_temp},
431	{W83781D_SYSCTL_TEMP2, "temp2", NULL, 0, 0644, NULL, &i2c_proc_real,
432	&i2c_sysctl_real, NULL, &w83781d_temp_add},
433	{W83781D_SYSCTL_TEMP3, "temp3", NULL, 0, 0644, NULL, &i2c_proc_real,
434	&i2c_sysctl_real, NULL, &w83781d_temp_add},
435	{W83781D_SYSCTL_VID, "vid", NULL, 0, 0444, NULL, &i2c_proc_real,
436	&i2c_sysctl_real, NULL, &w83781d_vid},
437	{W83781D_SYSCTL_VRM, "vrm", NULL, 0, 0644, NULL, &i2c_proc_real,
438	&i2c_sysctl_real, NULL, &w83781d_vrm},
439	{W83781D_SYSCTL_FAN_DIV, "fan_div", NULL, 0, 0644, NULL, &i2c_proc_real,
440	&i2c_sysctl_real, NULL, &w83781d_fan_div},
441	{W83781D_SYSCTL_ALARMS, "alarms", NULL, 0, 0444, NULL, &i2c_proc_real,
442	&i2c_sysctl_real, NULL, &w83781d_alarms},
443	{W83781D_SYSCTL_BEEP, "beep", NULL, 0, 0644, NULL, &i2c_proc_real,
444	&i2c_sysctl_real, NULL, &w83781d_beep},
445	{0}
446	};
447
448	static ctl_table w83781d_dir_table_template[] = {
449	{W83781D_SYSCTL_IN0, "in0", NULL, 0, 0644, NULL, &i2c_proc_real,
450	&i2c_sysctl_real, NULL, &w83781d_in},
451	{W83781D_SYSCTL_IN1, "in1", NULL, 0, 0644, NULL, &i2c_proc_real,
452	&i2c_sysctl_real, NULL, &w83781d_in},
453	{W83781D_SYSCTL_IN2, "in2", NULL, 0, 0644, NULL, &i2c_proc_real,
454	&i2c_sysctl_real, NULL, &w83781d_in},
455	{W83781D_SYSCTL_IN3, "in3", NULL, 0, 0644, NULL, &i2c_proc_real,
456	&i2c_sysctl_real, NULL, &w83781d_in},
457	{W83781D_SYSCTL_IN4, "in4", NULL, 0, 0644, NULL, &i2c_proc_real,
458	&i2c_sysctl_real, NULL, &w83781d_in},
459	{W83781D_SYSCTL_IN5, "in5", NULL, 0, 0644, NULL, &i2c_proc_real,
460	&i2c_sysctl_real, NULL, &w83781d_in},
461	{W83781D_SYSCTL_IN6, "in6", NULL, 0, 0644, NULL, &i2c_proc_real,
462	&i2c_sysctl_real, NULL, &w83781d_in},
463	{W83781D_SYSCTL_FAN1, "fan1", NULL, 0, 0644, NULL, &i2c_proc_real,
464	&i2c_sysctl_real, NULL, &w83781d_fan},
465	{W83781D_SYSCTL_FAN2, "fan2", NULL, 0, 0644, NULL, &i2c_proc_real,
466	&i2c_sysctl_real, NULL, &w83781d_fan},
467	{W83781D_SYSCTL_FAN3, "fan3", NULL, 0, 0644, NULL, &i2c_proc_real,
468	&i2c_sysctl_real, NULL, &w83781d_fan},
469	{W83781D_SYSCTL_TEMP1, "temp1", NULL, 0, 0644, NULL, &i2c_proc_real,
470	&i2c_sysctl_real, NULL, &w83781d_temp},
471	{W83781D_SYSCTL_TEMP2, "temp2", NULL, 0, 0644, NULL, &i2c_proc_real,
472	&i2c_sysctl_real, NULL, &w83781d_temp_add},
473	{W83781D_SYSCTL_TEMP3, "temp3", NULL, 0, 0644, NULL, &i2c_proc_real,
474	&i2c_sysctl_real, NULL, &w83781d_temp_add},
475	{W83781D_SYSCTL_VID, "vid", NULL, 0, 0444, NULL, &i2c_proc_real,
476	&i2c_sysctl_real, NULL, &w83781d_vid},
477	{W83781D_SYSCTL_VRM, "vrm", NULL, 0, 0644, NULL, &i2c_proc_real,
478	&i2c_sysctl_real, NULL, &w83781d_vrm},
479	{W83781D_SYSCTL_FAN_DIV, "fan_div", NULL, 0, 0644, NULL, &i2c_proc_real,
480	&i2c_sysctl_real, NULL, &w83781d_fan_div},
481	{W83781D_SYSCTL_ALARMS, "alarms", NULL, 0, 0444, NULL, &i2c_proc_real,
482	&i2c_sysctl_real, NULL, &w83781d_alarms},
483	{W83781D_SYSCTL_BEEP, "beep", NULL, 0, 0644, NULL, &i2c_proc_real,
484	&i2c_sysctl_real, NULL, &w83781d_beep},
485	#ifdef W83781D_RT
486	{W83781D_SYSCTL_RT1, "rt1", NULL, 0, 0644, NULL, &i2c_proc_real,
487	&i2c_sysctl_real, NULL, &w83781d_rt},
488	{W83781D_SYSCTL_RT2, "rt2", NULL, 0, 0644, NULL, &i2c_proc_real,
489	&i2c_sysctl_real, NULL, &w83781d_rt},
490	{W83781D_SYSCTL_RT3, "rt3", NULL, 0, 0644, NULL, &i2c_proc_real,
491	&i2c_sysctl_real, NULL, &w83781d_rt},
492	#endif
493	{0}
494	};
495
496	/* without pwm3-4 */
497	static ctl_table w83782d_isa_dir_table_template[] = {
498	{W83781D_SYSCTL_IN0, "in0", NULL, 0, 0644, NULL, &i2c_proc_real,
499	&i2c_sysctl_real, NULL, &w83781d_in},
500	{W83781D_SYSCTL_IN1, "in1", NULL, 0, 0644, NULL, &i2c_proc_real,
501	&i2c_sysctl_real, NULL, &w83781d_in},
502	{W83781D_SYSCTL_IN2, "in2", NULL, 0, 0644, NULL, &i2c_proc_real,
503	&i2c_sysctl_real, NULL, &w83781d_in},
504	{W83781D_SYSCTL_IN3, "in3", NULL, 0, 0644, NULL, &i2c_proc_real,
505	&i2c_sysctl_real, NULL, &w83781d_in},
506	{W83781D_SYSCTL_IN4, "in4", NULL, 0, 0644, NULL, &i2c_proc_real,
507	&i2c_sysctl_real, NULL, &w83781d_in},
508	{W83781D_SYSCTL_IN5, "in5", NULL, 0, 0644, NULL, &i2c_proc_real,
509	&i2c_sysctl_real, NULL, &w83781d_in},
510	{W83781D_SYSCTL_IN6, "in6", NULL, 0, 0644, NULL, &i2c_proc_real,
511	&i2c_sysctl_real, NULL, &w83781d_in},
512	{W83781D_SYSCTL_IN7, "in7", NULL, 0, 0644, NULL, &i2c_proc_real,
513	&i2c_sysctl_real, NULL, &w83781d_in},
514	{W83781D_SYSCTL_IN8, "in8", NULL, 0, 0644, NULL, &i2c_proc_real,
515	&i2c_sysctl_real, NULL, &w83781d_in},
516	{W83781D_SYSCTL_FAN1, "fan1", NULL, 0, 0644, NULL, &i2c_proc_real,
517	&i2c_sysctl_real, NULL, &w83781d_fan},
518	{W83781D_SYSCTL_FAN2, "fan2", NULL, 0, 0644, NULL, &i2c_proc_real,
519	&i2c_sysctl_real, NULL, &w83781d_fan},
520	{W83781D_SYSCTL_FAN3, "fan3", NULL, 0, 0644, NULL, &i2c_proc_real,
521	&i2c_sysctl_real, NULL, &w83781d_fan},
522	{W83781D_SYSCTL_TEMP1, "temp1", NULL, 0, 0644, NULL, &i2c_proc_real,
523	&i2c_sysctl_real, NULL, &w83781d_temp},
524	{W83781D_SYSCTL_TEMP2, "temp2", NULL, 0, 0644, NULL, &i2c_proc_real,
525	&i2c_sysctl_real, NULL, &w83781d_temp_add},
526	{W83781D_SYSCTL_TEMP3, "temp3", NULL, 0, 0644, NULL, &i2c_proc_real,
527	&i2c_sysctl_real, NULL, &w83781d_temp_add},
528	{W83781D_SYSCTL_VID, "vid", NULL, 0, 0444, NULL, &i2c_proc_real,
529	&i2c_sysctl_real, NULL, &w83781d_vid},
530	{W83781D_SYSCTL_VRM, "vrm", NULL, 0, 0644, NULL, &i2c_proc_real,
531	&i2c_sysctl_real, NULL, &w83781d_vrm},
532	{W83781D_SYSCTL_FAN_DIV, "fan_div", NULL, 0, 0644, NULL, &i2c_proc_real,
533	&i2c_sysctl_real, NULL, &w83781d_fan_div},
534	{W83781D_SYSCTL_ALARMS, "alarms", NULL, 0, 0444, NULL, &i2c_proc_real,
535	&i2c_sysctl_real, NULL, &w83781d_alarms},
536	{W83781D_SYSCTL_BEEP, "beep", NULL, 0, 0644, NULL, &i2c_proc_real,
537	&i2c_sysctl_real, NULL, &w83781d_beep},
538	{W83781D_SYSCTL_PWM1, "pwm1", NULL, 0, 0644, NULL, &i2c_proc_real,
539	&i2c_sysctl_real, NULL, &w83781d_pwm},
540	{W83781D_SYSCTL_PWM2, "pwm2", NULL, 0, 0644, NULL, &i2c_proc_real,
541	&i2c_sysctl_real, NULL, &w83781d_pwm},
542	{W83781D_SYSCTL_SENS1, "sensor1", NULL, 0, 0644, NULL, &i2c_proc_real,
543	&i2c_sysctl_real, NULL, &w83781d_sens},
544	{W83781D_SYSCTL_SENS2, "sensor2", NULL, 0, 0644, NULL, &i2c_proc_real,
545	&i2c_sysctl_real, NULL, &w83781d_sens},
546	{W83781D_SYSCTL_SENS3, "sensor3", NULL, 0, 0644, NULL, &i2c_proc_real,
547	&i2c_sysctl_real, NULL, &w83781d_sens},
548	{0}
549	};
550
551	/* with pwm3-4 */
552	static ctl_table w83782d_i2c_dir_table_template[] = {
553	{W83781D_SYSCTL_IN0, "in0", NULL, 0, 0644, NULL, &i2c_proc_real,
554	&i2c_sysctl_real, NULL, &w83781d_in},
555	{W83781D_SYSCTL_IN1, "in1", NULL, 0, 0644, NULL, &i2c_proc_real,
556	&i2c_sysctl_real, NULL, &w83781d_in},
557	{W83781D_SYSCTL_IN2, "in2", NULL, 0, 0644, NULL, &i2c_proc_real,
558	&i2c_sysctl_real, NULL, &w83781d_in},
559	{W83781D_SYSCTL_IN3, "in3", NULL, 0, 0644, NULL, &i2c_proc_real,
560	&i2c_sysctl_real, NULL, &w83781d_in},
561	{W83781D_SYSCTL_IN4, "in4", NULL, 0, 0644, NULL, &i2c_proc_real,
562	&i2c_sysctl_real, NULL, &w83781d_in},
563	{W83781D_SYSCTL_IN5, "in5", NULL, 0, 0644, NULL, &i2c_proc_real,
564	&i2c_sysctl_real, NULL, &w83781d_in},
565	{W83781D_SYSCTL_IN6, "in6", NULL, 0, 0644, NULL, &i2c_proc_real,
566	&i2c_sysctl_real, NULL, &w83781d_in},
567	{W83781D_SYSCTL_IN7, "in7", NULL, 0, 0644, NULL, &i2c_proc_real,
568	&i2c_sysctl_real, NULL, &w83781d_in},
569	{W83781D_SYSCTL_IN8, "in8", NULL, 0, 0644, NULL, &i2c_proc_real,
570	&i2c_sysctl_real, NULL, &w83781d_in},
571	{W83781D_SYSCTL_FAN1, "fan1", NULL, 0, 0644, NULL, &i2c_proc_real,
572	&i2c_sysctl_real, NULL, &w83781d_fan},
573	{W83781D_SYSCTL_FAN2, "fan2", NULL, 0, 0644, NULL, &i2c_proc_real,
574	&i2c_sysctl_real, NULL, &w83781d_fan},
575	{W83781D_SYSCTL_FAN3, "fan3", NULL, 0, 0644, NULL, &i2c_proc_real,
576	&i2c_sysctl_real, NULL, &w83781d_fan},
577	{W83781D_SYSCTL_TEMP1, "temp1", NULL, 0, 0644, NULL, &i2c_proc_real,
578	&i2c_sysctl_real, NULL, &w83781d_temp},
579	{W83781D_SYSCTL_TEMP2, "temp2", NULL, 0, 0644, NULL, &i2c_proc_real,
580	&i2c_sysctl_real, NULL, &w83781d_temp_add},
581	{W83781D_SYSCTL_TEMP3, "temp3", NULL, 0, 0644, NULL, &i2c_proc_real,
582	&i2c_sysctl_real, NULL, &w83781d_temp_add},
583	{W83781D_SYSCTL_VID, "vid", NULL, 0, 0444, NULL, &i2c_proc_real,
584	&i2c_sysctl_real, NULL, &w83781d_vid},
585	{W83781D_SYSCTL_VRM, "vrm", NULL, 0, 0644, NULL, &i2c_proc_real,
586	&i2c_sysctl_real, NULL, &w83781d_vrm},
587	{W83781D_SYSCTL_FAN_DIV, "fan_div", NULL, 0, 0644, NULL, &i2c_proc_real,
588	&i2c_sysctl_real, NULL, &w83781d_fan_div},
589	{W83781D_SYSCTL_ALARMS, "alarms", NULL, 0, 0444, NULL, &i2c_proc_real,
590	&i2c_sysctl_real, NULL, &w83781d_alarms},
591	{W83781D_SYSCTL_BEEP, "beep", NULL, 0, 0644, NULL, &i2c_proc_real,
592	&i2c_sysctl_real, NULL, &w83781d_beep},
593	{W83781D_SYSCTL_PWM1, "pwm1", NULL, 0, 0644, NULL, &i2c_proc_real,
594	&i2c_sysctl_real, NULL, &w83781d_pwm},
595	{W83781D_SYSCTL_PWM2, "pwm2", NULL, 0, 0644, NULL, &i2c_proc_real,
596	&i2c_sysctl_real, NULL, &w83781d_pwm},
597	{W83781D_SYSCTL_PWM3, "pwm3", NULL, 0, 0644, NULL, &i2c_proc_real,
598	&i2c_sysctl_real, NULL, &w83781d_pwm},
599	{W83781D_SYSCTL_PWM4, "pwm4", NULL, 0, 0644, NULL, &i2c_proc_real,
600	&i2c_sysctl_real, NULL, &w83781d_pwm},
601	{W83781D_SYSCTL_SENS1, "sensor1", NULL, 0, 0644, NULL, &i2c_proc_real,
602	&i2c_sysctl_real, NULL, &w83781d_sens},
603	{W83781D_SYSCTL_SENS2, "sensor2", NULL, 0, 0644, NULL, &i2c_proc_real,
604	&i2c_sysctl_real, NULL, &w83781d_sens},
605	{W83781D_SYSCTL_SENS3, "sensor3", NULL, 0, 0644, NULL, &i2c_proc_real,
606	&i2c_sysctl_real, NULL, &w83781d_sens},
607	{0}
608	};
609
610	/* w83791D has 10 voltages 5 fans and 3 temps. 2 of the temps are on other
611	devices. */
612	static ctl_table w83791d_dir_table_template[] = {
613	{W83781D_SYSCTL_IN0, "in0", NULL, 0, 0644, NULL, &i2c_proc_real,
614	&i2c_sysctl_real, NULL, &w83781d_in},
615	{W83781D_SYSCTL_IN1, "in1", NULL, 0, 0644, NULL, &i2c_proc_real,
616	&i2c_sysctl_real, NULL, &w83781d_in},
617	{W83781D_SYSCTL_IN2, "in2", NULL, 0, 0644, NULL, &i2c_proc_real,
618	&i2c_sysctl_real, NULL, &w83781d_in},
619	{W83781D_SYSCTL_IN3, "in3", NULL, 0, 0644, NULL, &i2c_proc_real,
620	&i2c_sysctl_real, NULL, &w83781d_in},
621	{W83781D_SYSCTL_IN4, "in4", NULL, 0, 0644, NULL, &i2c_proc_real,
622	&i2c_sysctl_real, NULL, &w83781d_in},
623	{W83781D_SYSCTL_IN5, "in5", NULL, 0, 0644, NULL, &i2c_proc_real,
624	&i2c_sysctl_real, NULL, &w83781d_in},
625	{W83781D_SYSCTL_IN6, "in6", NULL, 0, 0644, NULL, &i2c_proc_real,
626	&i2c_sysctl_real, NULL, &w83781d_in},
627	{W83781D_SYSCTL_IN7, "in7", NULL, 0, 0644, NULL, &i2c_proc_real,
628	&i2c_sysctl_real, NULL, &w83781d_in},
629	{W83781D_SYSCTL_IN8, "in8", NULL, 0, 0644, NULL, &i2c_proc_real,
630	&i2c_sysctl_real, NULL, &w83781d_in},
631	{W83781D_SYSCTL_IN9, "in9", NULL, 0, 0644, NULL, &i2c_proc_real,
632	&i2c_sysctl_real, NULL, &w83781d_in},
633	{W83781D_SYSCTL_FAN1, "fan1", NULL, 0, 0644, NULL, &i2c_proc_real,
634	&i2c_sysctl_real, NULL, &w83781d_fan},
635	{W83781D_SYSCTL_FAN2, "fan2", NULL, 0, 0644, NULL, &i2c_proc_real,
636	&i2c_sysctl_real, NULL, &w83781d_fan},
637	{W83781D_SYSCTL_FAN3, "fan3", NULL, 0, 0644, NULL, &i2c_proc_real,
638	&i2c_sysctl_real, NULL, &w83781d_fan},
639	{W83781D_SYSCTL_FAN4, "fan4", NULL, 0, 0644, NULL, &i2c_proc_real,
640	&i2c_sysctl_real, NULL, &w83781d_fan},
641	{W83781D_SYSCTL_FAN5, "fan5", NULL, 0, 0644, NULL, &i2c_proc_real,
642	&i2c_sysctl_real, NULL, &w83781d_fan},
643	{W83781D_SYSCTL_TEMP1, "temp1", NULL, 0, 0644, NULL, &i2c_proc_real,
644	&i2c_sysctl_real, NULL, &w83781d_temp},
645	{W83781D_SYSCTL_TEMP2, "temp2", NULL, 0, 0644, NULL, &i2c_proc_real,
646	&i2c_sysctl_real, NULL, &w83781d_temp_add},
647	{W83781D_SYSCTL_TEMP3, "temp3", NULL, 0, 0644, NULL, &i2c_proc_real,
648	&i2c_sysctl_real, NULL, &w83781d_temp_add},
649	{W83781D_SYSCTL_VID, "vid", NULL, 0, 0444, NULL, &i2c_proc_real,
650	&i2c_sysctl_real, NULL, &w83781d_vid},
651	{W83781D_SYSCTL_FAN_DIV, "fan_div", NULL, 0, 0644, NULL, &i2c_proc_real,
652	&i2c_sysctl_real, NULL, &w83781d_fan_div},
653	{W83781D_SYSCTL_ALARMS, "alarms", NULL, 0, 0444, NULL, &i2c_proc_real,
654	&i2c_sysctl_real, NULL, &w83781d_alarms},
655	{W83781D_SYSCTL_BEEP, "beep", NULL, 0, 0644, NULL, &i2c_proc_real,
656	&i2c_sysctl_real, NULL, &w83781d_beep},
657	{W83781D_SYSCTL_PWM1, "pwm1", NULL, 0, 0644, NULL, &i2c_proc_real,
658	&i2c_sysctl_real, NULL, &w83781d_pwm},
659	{W83781D_SYSCTL_PWM2, "pwm2", NULL, 0, 0644, NULL, &i2c_proc_real,
660	&i2c_sysctl_real, NULL, &w83781d_pwm},
661	{W83781D_SYSCTL_PWM3, "pwm3", NULL, 0, 0644, NULL, &i2c_proc_real,
662	&i2c_sysctl_real, NULL, &w83781d_pwm},
663	{W83781D_SYSCTL_PWM4, "pwm4", NULL, 0, 0644, NULL, &i2c_proc_real,
664	&i2c_sysctl_real, NULL, &w83781d_pwm},
665	{W83781D_SYSCTL_VRM, "vrm", NULL, 0, 0644, NULL, &i2c_proc_real,
666	&i2c_sysctl_real, NULL, &w83781d_vrm},
667	{0}
668	};
669
670	static ctl_table w83783s_dir_table_template[] = {
671	{W83781D_SYSCTL_IN0, "in0", NULL, 0, 0644, NULL, &i2c_proc_real,
672	&i2c_sysctl_real, NULL, &w83781d_in},
673	/* no in1 to maintain compatibility with 781d and 782d. */
674	{W83781D_SYSCTL_IN2, "in2", NULL, 0, 0644, NULL, &i2c_proc_real,
675	&i2c_sysctl_real, NULL, &w83781d_in},
676	{W83781D_SYSCTL_IN3, "in3", NULL, 0, 0644, NULL, &i2c_proc_real,
677	&i2c_sysctl_real, NULL, &w83781d_in},
678	{W83781D_SYSCTL_IN4, "in4", NULL, 0, 0644, NULL, &i2c_proc_real,
679	&i2c_sysctl_real, NULL, &w83781d_in},
680	{W83781D_SYSCTL_IN5, "in5", NULL, 0, 0644, NULL, &i2c_proc_real,
681	&i2c_sysctl_real, NULL, &w83781d_in},
682	{W83781D_SYSCTL_IN6, "in6", NULL, 0, 0644, NULL, &i2c_proc_real,
683	&i2c_sysctl_real, NULL, &w83781d_in},
684	{W83781D_SYSCTL_FAN1, "fan1", NULL, 0, 0644, NULL, &i2c_proc_real,
685	&i2c_sysctl_real, NULL, &w83781d_fan},
686	{W83781D_SYSCTL_FAN2, "fan2", NULL, 0, 0644, NULL, &i2c_proc_real,
687	&i2c_sysctl_real, NULL, &w83781d_fan},
688	{W83781D_SYSCTL_FAN3, "fan3", NULL, 0, 0644, NULL, &i2c_proc_real,
689	&i2c_sysctl_real, NULL, &w83781d_fan},
690	{W83781D_SYSCTL_TEMP1, "temp1", NULL, 0, 0644, NULL, &i2c_proc_real,
691	&i2c_sysctl_real, NULL, &w83781d_temp},
692	{W83781D_SYSCTL_TEMP2, "temp2", NULL, 0, 0644, NULL, &i2c_proc_real,
693	&i2c_sysctl_real, NULL, &w83781d_temp_add},
694	{W83781D_SYSCTL_VID, "vid", NULL, 0, 0444, NULL, &i2c_proc_real,
695	&i2c_sysctl_real, NULL, &w83781d_vid},
696	{W83781D_SYSCTL_VRM, "vrm", NULL, 0, 0644, NULL, &i2c_proc_real,
697	&i2c_sysctl_real, NULL, &w83781d_vrm},
698	{W83781D_SYSCTL_FAN_DIV, "fan_div", NULL, 0, 0644, NULL, &i2c_proc_real,
699	&i2c_sysctl_real, NULL, &w83781d_fan_div},
700	{W83781D_SYSCTL_ALARMS, "alarms", NULL, 0, 0444, NULL, &i2c_proc_real,
701	&i2c_sysctl_real, NULL, &w83781d_alarms},
702	{W83781D_SYSCTL_BEEP, "beep", NULL, 0, 0644, NULL, &i2c_proc_real,
703	&i2c_sysctl_real, NULL, &w83781d_beep},
704	{W83781D_SYSCTL_PWM1, "pwm1", NULL, 0, 0644, NULL, &i2c_proc_real,
705	&i2c_sysctl_real, NULL, &w83781d_pwm},
706	{W83781D_SYSCTL_PWM2, "pwm2", NULL, 0, 0644, NULL, &i2c_proc_real,
707	&i2c_sysctl_real, NULL, &w83781d_pwm},
708	{W83781D_SYSCTL_SENS1, "sensor1", NULL, 0, 0644, NULL, &i2c_proc_real,
709	&i2c_sysctl_real, NULL, &w83781d_sens},
710	{W83781D_SYSCTL_SENS2, "sensor2", NULL, 0, 0644, NULL, &i2c_proc_real,
711	&i2c_sysctl_real, NULL, &w83781d_sens},
712	{0}
713	};
714
715
716	/* This function is called when:
717	* w83781d_driver is inserted (when this module is loaded), for each
718	available adapter
719	* when a new adapter is inserted (and w83781d_driver is still present) */
720	static int w83781d_attach_adapter(struct i2c_adapter *adapter)
721	{
722	return i2c_detect(adapter, &addr_data, w83781d_detect);
723	}
724
725	static int w83781d_detect(struct i2c_adapter *adapter, int address,
726	unsigned short flags, int kind)
727	{
728	int i, val1 = 0, val2, id;
729	struct i2c_client *new_client;
730	struct w83781d_data *data;
731	int err = 0;
732	const char *type_name = "";
733	const char *client_name = "";
734	int is_isa = i2c_is_isa_adapter(adapter);
735	enum vendor { winbond, asus } vendid;
736
737	if (!is_isa
738	&& !i2c_check_functionality(adapter,
739	I2C_FUNC_SMBUS_BYTE_DATA)) goto
740	ERROR0;
741
742	if (is_isa) {
743	if (!request_region(address, W83781D_EXTENT, "w83781d"))
744	goto ERROR0;
745	release_region(address, W83781D_EXTENT);
746	}
747
748	/* Probe whether there is anything available on this address. Already
749	done for SMBus clients */
750	if (kind < 0) {
751	if (is_isa) {
752
753	#define REALLY_SLOW_IO
754	/* We need the timeouts for at least some LM78-like chips. But only
755	if we read 'undefined' registers. */
756	i = inb_p(address + 1);
757	if (inb_p(address + 2) != i)
758	goto ERROR0;
759	if (inb_p(address + 3) != i)
760	goto ERROR0;
761	if (inb_p(address + 7) != i)
762	goto ERROR0;
763	#undef REALLY_SLOW_IO
764
765	/* Let's just hope nothing breaks here */
766	i = inb_p(address + 5) & 0x7f;
767	outb_p(~i & 0x7f, address + 5);
768	if ((inb_p(address + 5) & 0x7f) != (~i & 0x7f)) {
769	outb_p(i, address + 5);
770	return 0;
771	}
772	}
773	}
774
775	/* OK. For now, we presume we have a valid client. We now create the
776	client structure, even though we cannot fill it completely yet.
777	But it allows us to access w83781d_{read,write}_value. */
778
779	if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
780	err = -ENOMEM;
781	goto ERROR0;
782	}
783
784	new_client = &data->client;
785	new_client->addr = address;
786	init_MUTEX(&data->lock);
787	new_client->data = data;
788	new_client->adapter = adapter;
789	new_client->driver = &w83781d_driver;
790	new_client->flags = 0;
791
792	/* Now, we do the remaining detection. */
793
794	/* The w8378?d may be stuck in some other bank than bank 0. This may
795	make reading other information impossible. Specify a force=... or
796	force_*=... parameter, and the Winbond will be reset to the right
797	bank. */
798	if (kind < 0) {
799	if (w83781d_read_value(new_client, W83781D_REG_CONFIG) &
800	0x80)
801	goto ERROR1;
802
803	val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
804	val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
805	/* Check for Winbond or Asus ID if in bank 0 */
806	if ((!(val1 & 0x07)) &&
807	(((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
808	\|\| ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12))))
809	goto ERROR1;
810
811	/* If Winbond SMBus, check address at 0x48.
812	Asus doesn't support, except for the as99127f rev.2 */
813	if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) \|\|
814	((val1 & 0x80) && (val2 == 0x5c)))) {
815	if (w83781d_read_value
816	(new_client, W83781D_REG_I2C_ADDR) != address)
817	goto ERROR1;
818	}
819	}
820
821	/* We have either had a force parameter, or we have already detected the
822	Winbond. Put it now into bank 0 and Vendor ID High Byte */
823	w83781d_write_value(new_client, W83781D_REG_BANK,
824	(w83781d_read_value(new_client,
825	W83781D_REG_BANK) & 0x78) \|
826	0x80);
827
828	/* Determine the chip type. */
829	if (kind <= 0) {
830	/* get vendor ID */
831	val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
832	if (val2 == 0x5c)
833	vendid = winbond;
834	else if (val2 == 0x12)
835	vendid = asus;
836	else
837	goto ERROR1;
838
839	val1 =
840	w83781d_read_value(new_client, W83781D_REG_WCHIPID);
841	if ((val1 == 0x10 \|\| val1 == 0x11) && vendid == winbond)
842	kind = w83781d;
843	else if (val1 == 0x30 && vendid == winbond)
844	kind = w83782d;
845	else if (val1 == 0x40 && vendid == winbond && !is_isa && address == 0x2d)
846	kind = w83783s;
847	else if (val1 == 0x21 && vendid == winbond)
848	kind = w83627hf;
849	else if (val1 == 0x71 && vendid == winbond && address >= 0x2c)
850	kind = w83791d;
851	else if (val1 == 0x31 && !is_isa && address >= 0x28)
852	kind = as99127f;
853	else {
854	if (kind == 0)
855	printk(KERN_WARNING "w83781d.o: Ignoring "
856	"'force' parameter for unknown chip "
857	"at adapter %d, address 0x%02x\n",
858	i2c_adapter_id(adapter), address);
859	goto ERROR1;
860	}
861	}
862
863	if (kind == w83781d) {
864	type_name = "w83781d";
865	client_name = "W83781D chip";
866	} else if (kind == w83782d) {
867	type_name = "w83782d";
868	client_name = "W83782D chip";
869	} else if (kind == w83783s) {
870	type_name = "w83783s";
871	client_name = "W83783S chip";
872	} else if (kind == w83627hf) {
873	type_name = "w83627hf";
874	client_name = "W83627HF chip";
875	} else if (kind == as99127f) {
876	type_name = "as99127f";
877	client_name = "AS99127F chip";
878	} else if (kind == w83791d) {
879	type_name = "w83791d";
880	client_name = "W83791D chip";
881	} else {
882	#ifdef DEBUG
883	printk(KERN_ERR "w83781d.o: Internal error: unknown kind (%d)?!?",
884	kind);
885	#endif
886	err = -ENODEV;
887	goto ERROR1;
888	}
889
890	/* Reserve the ISA region */
891	if (is_isa)
892	request_region(address, W83781D_EXTENT, type_name);
893
894	/* Fill in the remaining client fields and put it into the global list */
895	strcpy(new_client->name, client_name);
896	data->type = kind;
897	data->valid = 0;
898	init_MUTEX(&data->update_lock);
899
900	/* Tell the I2C layer a new client has arrived */
901	if ((err = i2c_attach_client(new_client)))
902	goto ERROR3;
903
904	/* attach secondary i2c lm75-like clients */
905	if (!is_isa) {
906	if (!(data->lm75 = kmalloc(2 * sizeof(struct i2c_client),
907	GFP_KERNEL))) {
908	err = -ENOMEM;
909	goto ERROR4;
910	}
911	id = i2c_adapter_id(adapter);
912	if(force_subclients[0] == id && force_subclients[1] == address) {
913	for(i = 2; i <= 3; i++) {
914	if(force_subclients[i] < 0x48 \|\|
915	force_subclients[i] > 0x4f) {
916	printk(KERN_ERR "w83781d.o: Invalid subclient address %d; must be 0x48-0x4f\n",
917	force_subclients[i]);
918	goto ERROR5;
919	}
920	}
921	w83781d_write_value(new_client,
922	W83781D_REG_I2C_SUBADDR,
923	(force_subclients[2] & 0x07) \|
924	((force_subclients[3] & 0x07) <<4));
925	data->lm75[0].addr = force_subclients[2];
926	} else {
927	val1 = w83781d_read_value(new_client,
928	W83781D_REG_I2C_SUBADDR);
929	data->lm75[0].addr = 0x48 + (val1 & 0x07);
930	}
931	if (kind != w83783s) {
932	if(force_subclients[0] == id &&
933	force_subclients[1] == address) {
934	data->lm75[1].addr = force_subclients[3];
935	} else {
936	data->lm75[1].addr = 0x48 + ((val1 >> 4) & 0x07);
937	}
938	if(data->lm75[0].addr == data->lm75[1].addr) {
939	printk(KERN_ERR "w83781d.o: Duplicate addresses 0x%x for subclients.\n",
940	data->lm75[0].addr);
941	goto ERROR5;
942	}
943	}
944	if (kind == w83781d)
945	client_name = "W83781D subclient";
946	else if (kind == w83782d)
947	client_name = "W83782D subclient";
948	else if (kind == w83783s)
949	client_name = "W83783S subclient";
950	else if (kind == w83627hf)
951	client_name = "W83627HF subclient";
952	else if (kind == as99127f)
953	client_name = "AS99127F subclient";
954	else if (kind == w83791d)
955	client_name = "W83791D subclient";
956
957
958	for (i = 0; i <= 1; i++) {
959	data->lm75[i].data = NULL; /* store all data in w83781d */
960	data->lm75[i].adapter = adapter;
961	data->lm75[i].driver = &w83781d_driver;
962	data->lm75[i].flags = 0;
963	strcpy(data->lm75[i].name, client_name);
964	if ((err = i2c_attach_client(&(data->lm75[i])))) {
965	printk(KERN_ERR "w83781d.o: Subclient %d registration at address 0x%x failed.\n",
966	i, data->lm75[i].addr);
967	if (i == 1)
968	goto ERROR6;
969	goto ERROR5;
970	}
971	if (kind == w83783s)
972	break;
973	}
974	} else {
975	data->lm75 = NULL;
976	}
977
978	/* Register a new directory entry with module sensors */
979	if ((i = i2c_register_entry(new_client,
980	type_name,
981	(kind == as99127f) ?
982	as99127f_dir_table_template :
983	(kind == w83781d) ?
984	w83781d_dir_table_template :
985	(kind == w83783s) ?
986	w83783s_dir_table_template :
987	(kind == w83791d ) ?
988	w83791d_dir_table_template :
989	(is_isa \|\| kind == w83627hf) ?
990	w83782d_isa_dir_table_template :
991	w83782d_i2c_dir_table_template,
992	THIS_MODULE)) < 0) {
993	err = i;
994	goto ERROR7;
995	}
996	data->sysctl_id = i;
997
998	/* Only PWM2 can be disabled */
999	for(i = 0; i < 4; i++)
1000	data->pwmenable[i] = 1;
1001
1002	/* Initialize the chip */
1003	w83781d_init_client(new_client);
1004	return 0;
1005
1006	/* OK, this is not exactly good programming practice, usually. But it is
1007	very code-efficient in this case. */
1008
1009	ERROR7:
1010	if (!is_isa)
1011	i2c_detach_client(&
1012	(((struct
1013	w83781d_data *) (new_client->data))->
1014	lm75[1]));
1015	ERROR6:
1016	if (!is_isa)
1017	i2c_detach_client(&
1018	(((struct
1019	w83781d_data *) (new_client->data))->
1020	lm75[0]));
1021	ERROR5:
1022	if (!is_isa)
1023	kfree(((struct w83781d_data *) (new_client->data))->lm75);
1024	ERROR4:
1025	i2c_detach_client(new_client);
1026	ERROR3:
1027	if (is_isa)
1028	release_region(address, W83781D_EXTENT);
1029	ERROR1:
1030	kfree(data);
1031	ERROR0:
1032	return err;
1033	}
1034
1035	static int w83781d_detach_client(struct i2c_client *client)
1036	{
1037	int err;
1038	struct w83781d_data *data = client->data;
1039
1040	i2c_deregister_entry(data->sysctl_id);
1041
1042	if ((err = i2c_detach_client(client))) {
1043	printk
1044	(KERN_ERR "w83781d.o: Client deregistration failed, client not detached.\n");
1045	return err;
1046	}
1047
1048	if(i2c_is_isa_client(client)) {
1049	release_region(client->addr, W83781D_EXTENT);
1050	} else {
1051	i2c_detach_client(&(data->lm75[0]));
1052	if (data->type != w83783s)
1053	i2c_detach_client(&(data->lm75[1]));
1054	kfree(data->lm75);
1055	}
1056	kfree(data);
1057
1058	return 0;
1059	}
1060
1061	/* The SMBus locks itself, usually, but nothing may access the Winbond between
1062	bank switches. ISA access must always be locked explicitly!
1063	We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1064	would slow down the W83781D access and should not be necessary.
1065	There are some ugly typecasts here, but the good news is - they should
1066	nowhere else be necessary! */
1067	static int w83781d_read_value(struct i2c_client *client, u16 reg)
1068	{
1069	int res, word_sized, bank;
1070	struct i2c_client *cl;
1071
1072	down(&(((struct w83781d_data *) (client->data))->lock));
1073	if (i2c_is_isa_client(client)) {
1074	word_sized = (((reg & 0xff00) == 0x100)
1075	\|\| ((reg & 0xff00) == 0x200))
1076	&& (((reg & 0x00ff) == 0x50)
1077	\|\| ((reg & 0x00ff) == 0x53)
1078	\|\| ((reg & 0x00ff) == 0x55));
1079	if (reg & 0xff00) {
1080	outb_p(W83781D_REG_BANK,
1081	client->addr + W83781D_ADDR_REG_OFFSET);
1082	outb_p(reg >> 8,
1083	client->addr + W83781D_DATA_REG_OFFSET);
1084	}
1085	outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1086	res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1087	if (word_sized) {
1088	outb_p((reg & 0xff) + 1,
1089	client->addr + W83781D_ADDR_REG_OFFSET);
1090	res =
1091	(res << 8) + inb_p(client->addr +
1092	W83781D_DATA_REG_OFFSET);
1093	}
1094	if (reg & 0xff00) {
1095	outb_p(W83781D_REG_BANK,
1096	client->addr + W83781D_ADDR_REG_OFFSET);
1097	outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1098	}
1099	} else {
1100	bank = (reg >> 8) & 0x0f;
1101	if (bank > 2)
1102	/* switch banks */
1103	i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1104	bank);
1105	if (bank == 0 \|\| bank > 2) {
1106	res = i2c_smbus_read_byte_data(client, reg & 0xff);
1107	} else {
1108	/* switch to subclient */
1109	cl =
1110	&(((struct w83781d_data *) (client->data))->
1111	lm75[bank - 1]);
1112	/* convert from ISA to LM75 I2C addresses */
1113	switch (reg & 0xff) {
1114	case 0x50: /* TEMP */
1115	res = swab16(i2c_smbus_read_word_data(cl, 0));
1116	break;
1117	case 0x52: /* CONFIG */
1118	res = i2c_smbus_read_byte_data(cl, 1);
1119	break;
1120	case 0x53: /* HYST */
1121	res = swab16(i2c_smbus_read_word_data(cl, 2));
1122	break;
1123	case 0x55: /* OVER */
1124	default:
1125	res = swab16(i2c_smbus_read_word_data(cl, 3));
1126	break;
1127	}
1128	}
1129	if (bank > 2)
1130	i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1131	0);
1132	}
1133	up(&(((struct w83781d_data *) (client->data))->lock));
1134	return res;
1135	}
1136
1137	static int w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1138	{
1139	int word_sized, bank;
1140	struct i2c_client *cl;
1141
1142	down(&(((struct w83781d_data *) (client->data))->lock));
1143	if (i2c_is_isa_client(client)) {
1144	word_sized = (((reg & 0xff00) == 0x100)
1145	\|\| ((reg & 0xff00) == 0x200))
1146	&& (((reg & 0x00ff) == 0x53)
1147	\|\| ((reg & 0x00ff) == 0x55));
1148	if (reg & 0xff00) {
1149	outb_p(W83781D_REG_BANK,
1150	client->addr + W83781D_ADDR_REG_OFFSET);
1151	outb_p(reg >> 8,
1152	client->addr + W83781D_DATA_REG_OFFSET);
1153	}
1154	outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1155	if (word_sized) {
1156	outb_p(value >> 8,
1157	client->addr + W83781D_DATA_REG_OFFSET);
1158	outb_p((reg & 0xff) + 1,
1159	client->addr + W83781D_ADDR_REG_OFFSET);
1160	}
1161	outb_p(value & 0xff,
1162	client->addr + W83781D_DATA_REG_OFFSET);
1163	if (reg & 0xff00) {
1164	outb_p(W83781D_REG_BANK,
1165	client->addr + W83781D_ADDR_REG_OFFSET);
1166	outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1167	}
1168	} else {
1169	bank = (reg >> 8) & 0x0f;
1170	if (bank > 2)
1171	/* switch banks */
1172	i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1173	bank);
1174	if (bank == 0 \|\| bank > 2) {
1175	i2c_smbus_write_byte_data(client, reg & 0xff,
1176	value & 0xff);
1177	} else {
1178	/* switch to subclient */
1179	cl = &(((struct w83781d_data *) (client->data))->
1180	lm75[bank - 1]);
1181	/* convert from ISA to LM75 I2C addresses */
1182	switch (reg & 0xff) {
1183	case 0x52: /* CONFIG */
1184	i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1185	break;
1186	case 0x53: /* HYST */
1187	i2c_smbus_write_word_data(cl, 2, swab16(value));
1188	break;
1189	case 0x55: /* OVER */
1190	i2c_smbus_write_word_data(cl, 3, swab16(value));
1191	break;
1192	}
1193	}
1194	if (bank > 2)
1195	i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1196	0);
1197	}
1198	up(&(((struct w83781d_data *) (client->data))->lock));
1199	return 0;
1200	}
1201
1202	/* Called when we have found a new W83781D. */
1203	static void w83781d_init_client(struct i2c_client *client)
1204	{
1205	struct w83781d_data *data = client->data;
1206	int i, p;
1207	int type = data->type;
1208	u8 tmp;
1209
1210	if(init && type != as99127f) { /* this resets registers we don't have
1211	documentation for on the as99127f */
1212	/* save these registers */
1213	i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1214	p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1215	/* Reset all except Watchdog values and last conversion values
1216	This sets fan-divs to 2, among others */
1217	w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1218	/* Restore the registers and disable power-on abnormal beep.
1219	This saves FAN 1/2/3 input/output values set by BIOS. */
1220	w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i \| 0x80);
1221	w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1222	/* Disable master beep-enable (reset turns it on).
1223	Individual beeps should be reset to off but for some reason
1224	disabling this bit helps some people not get beeped */
1225	w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1226	}
1227
1228	data->vrm = (type == w83791d) ? 90 : 82;
1229
1230	if ((type != w83781d) && (type != as99127f)) {
1231	tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1232	for (i = 1; i <= 3; i++) {
1233	if (!(tmp & BIT_SCFG1[i - 1])) {
1234	data->sens[i - 1] = W83781D_DEFAULT_BETA;
1235	} else {
1236	if (w83781d_read_value
1237	(client,
1238	W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1239	data->sens[i - 1] = 1;
1240	else
1241	data->sens[i - 1] = 2;
1242	}
1243	if (type == w83783s && i == 2)
1244	break;
1245	}
1246	}
1247	#ifdef W83781D_RT
1248	/*
1249	Fill up the RT Tables.
1250	We assume that they are 32 bytes long, in order for temp 1-3.
1251	Data sheet documentation is sparse.
1252	We also assume that it is only for the 781D although I suspect
1253	that the others support it as well....
1254	*/
1255
1256	if (init && type == w83781d) {
1257	u16 k = 0;
1258	/*
1259	Auto-indexing doesn't seem to work...
1260	w83781d_write_value(client,W83781D_REG_RT_IDX,0);
1261	*/
1262	for (i = 0; i < 3; i++) {
1263	int j;
1264	for (j = 0; j < 32; j++) {
1265	w83781d_write_value(client,
1266	W83781D_REG_RT_IDX,
1267	k++);
1268	data->rt[i][j] =
1269	w83781d_read_value(client,
1270	W83781D_REG_RT_VAL);
1271	}
1272	}
1273	}
1274	#endif /* W83781D_RT */
1275
1276	if (init && type != as99127f) {
1277	w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, 0x00);
1278	if (type != w83783s) {
1279	w83781d_write_value(client, W83781D_REG_TEMP3_CONFIG,
1280	0x00);
1281	}
1282	}
1283
1284	/* Start monitoring */
1285	w83781d_write_value(client, W83781D_REG_CONFIG,
1286	(w83781d_read_value(client,
1287	W83781D_REG_CONFIG) & 0xf7)
1288	\| 0x01);
1289	}
1290
1291	static void w83781d_update_client(struct i2c_client *client)
1292	{
1293	struct w83781d_data *data = client->data;
1294	int i;
1295
1296	down(&data->update_lock);
1297
1298	if (time_after(jiffies - data->last_updated, HZ + HZ / 2) \|\|
1299	time_before(jiffies, data->last_updated) \|\| !data->valid) {
1300	pr_debug(KERN_DEBUG "Starting device update\n");
1301
1302	for (i = 0; i <= 9; i++) {
1303	if ((data->type == w83783s)
1304	&& (i == 1))
1305	continue; /* 783S has no in1 */
1306	if (data->type == w83791d) {
1307	data->in[i] =
1308	w83781d_read_value(client, W83791D_REG_IN(i));
1309	data->in_min[i] =
1310	w83781d_read_value(client,
1311	W83791D_REG_IN_MIN(i));
1312	data->in_max[i] =
1313	w83781d_read_value(client,
1314	W83791D_REG_IN_MAX(i));
1315	} else {
1316	data->in[i] =
1317	w83781d_read_value(client, W83781D_REG_IN(i));
1318	data->in_min[i] =
1319	w83781d_read_value(client,
1320	W83781D_REG_IN_MIN(i));
1321	data->in_max[i] =
1322	w83781d_read_value(client,
1323	W83781D_REG_IN_MAX(i));
1324	}
1325	if ((data->type != w83782d)
1326	&& (data->type != w83627hf) && (i == 6)
1327	&& (data->type != w83791d))
1328	break;
1329
1330	if (data->type != w83791d && i == 8)
1331	break;
1332	}
1333	for (i = 1; i <= 5; i++) {
1334	data->fan[i - 1] =
1335	w83781d_read_value(client, W83781D_REG_FAN(i));
1336	data->fan_min[i - 1] =
1337	w83781d_read_value(client,
1338	W83781D_REG_FAN_MIN(i));
1339	if (data->type != w83791d && i == 3) break;
1340	}
1341	if (data->type != w83781d && data->type != as99127f) {
1342	for (i = 1; i <= 4; i++) {
1343	data->pwm[i - 1] =
1344	w83781d_read_value(client,
1345	W83781D_REG_PWM(data->type, i));
1346	if (((data->type == w83783s)
1347	\|\| (data->type == w83627hf)
1348	\|\| ((data->type == w83782d)
1349	&& i2c_is_isa_client(client)))
1350	&& i == 2)
1351	break;
1352	}
1353	/* Only PWM2 can be disabled */
1354	data->pwmenable[1] = (w83781d_read_value(client,
1355	W83781D_REG_PWMCLK12) & 0x08) >> 3;
1356	}
1357
1358	data->temp = w83781d_read_value(client, W83781D_REG_TEMP);
1359	data->temp_over =
1360	w83781d_read_value(client, W83781D_REG_TEMP_OVER);
1361	data->temp_hyst =
1362	w83781d_read_value(client, W83781D_REG_TEMP_HYST);
1363	data->temp_add[0] =
1364	w83781d_read_value(client, W83781D_REG_TEMP2);
1365	data->temp_add_over[0] =
1366	w83781d_read_value(client, W83781D_REG_TEMP2_OVER);
1367	data->temp_add_hyst[0] =
1368	w83781d_read_value(client, W83781D_REG_TEMP2_HYST);
1369	if (data->type != w83783s) {
1370	data->temp_add[1] =
1371	w83781d_read_value(client, W83781D_REG_TEMP3);
1372	data->temp_add_over[1] =
1373	w83781d_read_value(client, W83781D_REG_TEMP3_OVER);
1374	data->temp_add_hyst[1] =
1375	w83781d_read_value(client, W83781D_REG_TEMP3_HYST);
1376	}
1377	i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1378	data->vid = i & 0x0f;
1379	data->vid \|= (w83781d_read_value(client,
1380	W83781D_REG_CHIPID) & 0x01) << 4;
1381	data->fan_div[0] = (i >> 4) & 0x03;
1382	data->fan_div[1] = (i >> 6) & 0x03;
1383	data->fan_div[2] = (w83781d_read_value(client,
1384	W83781D_REG_PIN) >> 6) & 0x03;
1385	if ((data->type != w83781d) && (data->type != as99127f)) {
1386	i = w83781d_read_value(client, W83781D_REG_VBAT);
1387	data->fan_div[0] \|= (i >> 3) & 0x04;
1388	data->fan_div[1] \|= (i >> 4) & 0x04;
1389	data->fan_div[2] \|= (i >> 5) & 0x04;
1390	}
1391
1392	if ((data->type == w83782d) \|\| (data->type == w83627hf)) {
1393	data->alarms = w83781d_read_value(client,
1394	W83782D_REG_ALARM1)
1395	\| (w83781d_read_value(client,
1396	W83782D_REG_ALARM2) << 8)
1397	\| (w83781d_read_value(client,
1398	W83782D_REG_ALARM3) << 16);
1399	} else if (data->type == w83783s) {
1400	/* Only two real-time status registers */
1401	data->alarms = w83781d_read_value(client,
1402	W83782D_REG_ALARM1)
1403	\| (w83781d_read_value(client,
1404	W83782D_REG_ALARM2) << 8);
1405	} else if (data->type == w83791d) {
1406	data->alarms = w83781d_read_value(client,
1407	W83791D_REG_ALARM1)
1408	\| (w83781d_read_value(client,
1409	W83791D_REG_ALARM2) << 8)
1410	\| (w83781d_read_value(client,
1411	W83791D_REG_ALARM3) << 16);
1412	} else {
1413	/* No real-time status registers, fall back to
1414	interrupt status registers */
1415	data->alarms = w83781d_read_value(client,
1416	W83781D_REG_ALARM1)
1417	\| (w83781d_read_value(client,
1418	W83781D_REG_ALARM2) << 8);
1419	}
1420
1421	i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1422	data->beep_enable = i >> 7;
1423	data->beeps = ((i & 0x7f) << 8) +
1424	w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1425	if ((data->type != w83781d) && (data->type != as99127f)
1426	&& (data->type != w83791d)) {
1427	data->beeps \|=
1428	w83781d_read_value(client,
1429	W83781D_REG_BEEP_INTS3) << 16;
1430	}
1431	data->last_updated = jiffies;
1432	data->valid = 1;
1433	}
1434
1435	up(&data->update_lock);
1436	}
1437
1438
1439	/* The next few functions are the call-back functions of the /proc/sys and
1440	sysctl files. Which function is used is defined in the ctl_table in
1441	the extra1 field.
1442	Each function must return the magnitude (power of 10 to divide the date
1443	with) if it is called with operation==SENSORS_PROC_REAL_INFO. It must
1444	put a maximum of *nrels elements in results reflecting the data of this
1445	file, and set *nrels to the number it actually put in it, if operation==
1446	SENSORS_PROC_REAL_READ. Finally, it must get upto *nrels elements from
1447	results and write them to the chip, if operations==SENSORS_PROC_REAL_WRITE.
1448	Note that on SENSORS_PROC_REAL_READ, I do not check whether results is
1449	large enough (by checking the incoming value of *nrels). This is not very
1450	good practice, but as long as you put less than about 5 values in results,
1451	you can assume it is large enough. */
1452	static void w83781d_in(struct i2c_client *client, int operation, int ctl_name,
1453	int nrels_mag, long results)
1454	{
1455	struct w83781d_data *data = client->data;
1456	int nr = ctl_name - W83781D_SYSCTL_IN0;
1457
1458	if (operation == SENSORS_PROC_REAL_INFO)
1459	*nrels_mag = 2;
1460	else if (operation == SENSORS_PROC_REAL_READ) {
1461	w83781d_update_client(client);
1462	results[0] = IN_FROM_REG(data->in_min[nr]);
1463	results[1] = IN_FROM_REG(data->in_max[nr]);
1464	results[2] = IN_FROM_REG(data->in[nr]);
1465	*nrels_mag = 3;
1466	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1467	if (*nrels_mag >= 1) {
1468	data->in_min[nr] = IN_TO_REG(results[0]);
1469	w83781d_write_value(client, W83781D_REG_IN_MIN(nr),
1470	data->in_min[nr]);
1471	}
1472	if (*nrels_mag >= 2) {
1473	data->in_max[nr] = IN_TO_REG(results[1]);
1474	w83781d_write_value(client, W83781D_REG_IN_MAX(nr),
1475	data->in_max[nr]);
1476	}
1477	}
1478	}
1479
1480	void w83781d_fan(struct i2c_client *client, int operation, int ctl_name,
1481	int nrels_mag, long results)
1482	{
1483	struct w83781d_data *data = client->data;
1484	int nr = ctl_name - W83781D_SYSCTL_FAN1 + 1;
1485
1486	if (operation == SENSORS_PROC_REAL_INFO)
1487	*nrels_mag = 0;
1488	else if (operation == SENSORS_PROC_REAL_READ) {
1489	w83781d_update_client(client);
1490	results[0] = FAN_FROM_REG(data->fan_min[nr - 1],
1491	DIV_FROM_REG(data->fan_div[nr - 1]));
1492	results[1] = FAN_FROM_REG(data->fan[nr - 1],
1493	DIV_FROM_REG(data->fan_div[nr - 1]));
1494	*nrels_mag = 2;
1495	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1496	if (*nrels_mag >= 1) {
1497	data->fan_min[nr - 1] =
1498	FAN_TO_REG(results[0],
1499	DIV_FROM_REG(data->fan_div[nr-1]));
1500	w83781d_write_value(client,
1501	W83781D_REG_FAN_MIN(nr),
1502	data->fan_min[nr - 1]);
1503	}
1504	}
1505	}
1506
1507	void w83781d_temp(struct i2c_client *client, int operation, int ctl_name,
1508	int nrels_mag, long results)
1509	{
1510	struct w83781d_data *data = client->data;
1511	if (operation == SENSORS_PROC_REAL_INFO)
1512	*nrels_mag = 1;
1513	else if (operation == SENSORS_PROC_REAL_READ) {
1514	w83781d_update_client(client);
1515	results[0] = TEMP_FROM_REG(data->temp_over);
1516	results[1] = TEMP_FROM_REG(data->temp_hyst);
1517	results[2] = TEMP_FROM_REG(data->temp);
1518	*nrels_mag = 3;
1519	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1520	if (*nrels_mag >= 1) {
1521	data->temp_over = TEMP_TO_REG(results[0]);
1522	w83781d_write_value(client, W83781D_REG_TEMP_OVER,
1523	data->temp_over);
1524	}
1525	if (*nrels_mag >= 2) {
1526	data->temp_hyst = TEMP_TO_REG(results[1]);
1527	w83781d_write_value(client, W83781D_REG_TEMP_HYST,
1528	data->temp_hyst);
1529	}
1530	}
1531	}
1532
1533	void w83781d_temp_add(struct i2c_client *client, int operation,
1534	int ctl_name, int nrels_mag, long results)
1535	{
1536	struct w83781d_data *data = client->data;
1537	int nr = ctl_name - W83781D_SYSCTL_TEMP2;
1538
1539	if (operation == SENSORS_PROC_REAL_INFO)
1540	*nrels_mag = 1;
1541	else if (operation == SENSORS_PROC_REAL_READ) {
1542	w83781d_update_client(client);
1543	results[0] = LM75_TEMP_FROM_REG(data->temp_add_over[nr]);
1544	results[1] = LM75_TEMP_FROM_REG(data->temp_add_hyst[nr]);
1545	results[2] = LM75_TEMP_FROM_REG(data->temp_add[nr]);
1546	*nrels_mag = 3;
1547	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1548	if (*nrels_mag >= 1) {
1549	data->temp_add_over[nr] =
1550	LM75_TEMP_TO_REG(results[0]);
1551	w83781d_write_value(client,
1552	nr ? W83781D_REG_TEMP3_OVER :
1553	W83781D_REG_TEMP2_OVER,
1554	data->temp_add_over[nr]);
1555	}
1556	if (*nrels_mag >= 2) {
1557	data->temp_add_hyst[nr] =
1558	LM75_TEMP_TO_REG(results[1]);
1559	w83781d_write_value(client,
1560	nr ? W83781D_REG_TEMP3_HYST :
1561	W83781D_REG_TEMP2_HYST,
1562	data->temp_add_hyst[nr]);
1563	}
1564	}
1565	}
1566
1567
1568	void w83781d_vid(struct i2c_client *client, int operation, int ctl_name,
1569	int nrels_mag, long results)
1570	{
1571	struct w83781d_data *data = client->data;
1572	if (operation == SENSORS_PROC_REAL_INFO)
1573	*nrels_mag = 3;
1574	else if (operation == SENSORS_PROC_REAL_READ) {
1575	w83781d_update_client(client);
1576	results[0] = vid_from_reg(data->vid, data->vrm);
1577	*nrels_mag = 1;
1578	}
1579	}
1580
1581	void w83781d_vrm(struct i2c_client *client, int operation, int ctl_name,
1582	int nrels_mag, long results)
1583	{
1584	struct w83781d_data *data = client->data;
1585	if (operation == SENSORS_PROC_REAL_INFO)
1586	*nrels_mag = 1;
1587	else if (operation == SENSORS_PROC_REAL_READ) {
1588	results[0] = data->vrm;
1589	*nrels_mag = 1;
1590	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1591	if (*nrels_mag >= 1)
1592	data->vrm = results[0];
1593	}
1594	}
1595
1596	void w83781d_alarms(struct i2c_client *client, int operation, int ctl_name,
1597	int nrels_mag, long results)
1598	{
1599	struct w83781d_data *data = client->data;
1600	if (operation == SENSORS_PROC_REAL_INFO)
1601	*nrels_mag = 0;
1602	else if (operation == SENSORS_PROC_REAL_READ) {
1603	w83781d_update_client(client);
1604	results[0] = ALARMS_FROM_REG(data->alarms);
1605	*nrels_mag = 1;
1606	}
1607	}
1608
1609	void w83781d_beep(struct i2c_client *client, int operation, int ctl_name,
1610	int nrels_mag, long results)
1611	{
1612	struct w83781d_data *data = client->data;
1613	int val;
1614
1615	if (operation == SENSORS_PROC_REAL_INFO)
1616	*nrels_mag = 0;
1617	else if (operation == SENSORS_PROC_REAL_READ) {
1618	w83781d_update_client(client);
1619	results[0] = BEEP_ENABLE_FROM_REG(data->beep_enable);
1620	results[1] = BEEPS_FROM_REG(data->beeps, data->type);
1621	*nrels_mag = 2;
1622	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1623	if (*nrels_mag >= 2) {
1624	data->beeps = BEEPS_TO_REG(results[1], data->type);
1625	w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
1626	data->beeps & 0xff);
1627	if ((data->type != w83781d) &&
1628	(data->type != as99127f)) {
1629	w83781d_write_value(client,
1630	W83781D_REG_BEEP_INTS3,
1631	((data-> beeps) >> 16) &
1632	0xff);
1633	}
1634	val = (data->beeps >> 8) & 0x7f;
1635	} else if (*nrels_mag >= 1)
1636	val =
1637	w83781d_read_value(client,
1638	W83781D_REG_BEEP_INTS2) &
1639	0x7f;
1640	if (*nrels_mag >= 1) {
1641	data->beep_enable = BEEP_ENABLE_TO_REG(results[0]);
1642	w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
1643	val \| data->beep_enable << 7);
1644	}
1645	}
1646	}
1647
1648	void w83781d_fan_div(struct i2c_client *client, int operation,
1649	int ctl_name, int nrels_mag, long results)
1650	{
1651	struct w83781d_data *data = client->data;
1652	int old, old2, old3 = 0;
1653
1654	if (operation == SENSORS_PROC_REAL_INFO)
1655	*nrels_mag = 0;
1656	else if (operation == SENSORS_PROC_REAL_READ) {
1657	w83781d_update_client(client);
1658	results[0] = DIV_FROM_REG(data->fan_div[0]);
1659	results[1] = DIV_FROM_REG(data->fan_div[1]);
1660	results[2] = DIV_FROM_REG(data->fan_div[2]);
1661	*nrels_mag = 3;
1662	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1663	old = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1664	/* w83781d and as99127f don't have extended divisor bits */
1665	if ((data->type != w83781d) && data->type != as99127f) {
1666	old3 =
1667	w83781d_read_value(client, W83781D_REG_VBAT);
1668	}
1669	if (*nrels_mag >= 3) {
1670	data->fan_div[2] =
1671	DIV_TO_REG(results[2], data->type);
1672	old2 = w83781d_read_value(client, W83781D_REG_PIN);
1673	old2 =
1674	(old2 & 0x3f) \| ((data->fan_div[2] & 0x03) << 6);
1675	w83781d_write_value(client, W83781D_REG_PIN, old2);
1676	if ((data->type != w83781d) &&
1677	(data->type != as99127f)) {
1678	old3 =
1679	(old3 & 0x7f) \|
1680	((data->fan_div[2] & 0x04) << 5);
1681	}
1682	}
1683	if (*nrels_mag >= 2) {
1684	data->fan_div[1] =
1685	DIV_TO_REG(results[1], data->type);
1686	old =
1687	(old & 0x3f) \| ((data->fan_div[1] & 0x03) << 6);
1688	if ((data->type != w83781d) &&
1689	(data->type != as99127f)) {
1690	old3 =
1691	(old3 & 0xbf) \|
1692	((data->fan_div[1] & 0x04) << 4);
1693	}
1694	}
1695	if (*nrels_mag >= 1) {
1696	data->fan_div[0] =
1697	DIV_TO_REG(results[0], data->type);
1698	old =
1699	(old & 0xcf) \| ((data->fan_div[0] & 0x03) << 4);
1700	w83781d_write_value(client, W83781D_REG_VID_FANDIV,
1701	old);
1702	if ((data->type != w83781d) &&
1703	(data->type != as99127f)) {
1704	old3 =
1705	(old3 & 0xdf) \|
1706	((data->fan_div[0] & 0x04) << 3);
1707	w83781d_write_value(client,
1708	W83781D_REG_VBAT,
1709	old3);
1710	}
1711	}
1712	}
1713	}
1714
1715	void w83781d_pwm(struct i2c_client *client, int operation, int ctl_name,
1716	int nrels_mag, long results)
1717	{
1718	struct w83781d_data *data = client->data;
1719	int nr = 1 + ctl_name - W83781D_SYSCTL_PWM1;
1720	int j, k;
1721
1722	if (operation == SENSORS_PROC_REAL_INFO)
1723	*nrels_mag = 0;
1724	else if (operation == SENSORS_PROC_REAL_READ) {
1725	w83781d_update_client(client);
1726	results[0] = PWM_FROM_REG(data->pwm[nr - 1]);
1727	results[1] = data->pwmenable[nr - 1];
1728	*nrels_mag = 2;
1729	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1730	if (*nrels_mag >= 1) {
1731	data->pwm[nr - 1] = PWM_TO_REG(results[0]);
1732	w83781d_write_value(client,
1733	W83781D_REG_PWM(data->type, nr),
1734	data->pwm[nr - 1]);
1735	}
1736	/* only PWM2 can be enabled/disabled */
1737	if (*nrels_mag >= 2 && nr == 2) {
1738	j = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1739	k = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1740	if(results[1]) {
1741	if(!(j & 0x08))
1742	w83781d_write_value(client,
1743	W83781D_REG_PWMCLK12, j \| 0x08);
1744	if(k & 0x10)
1745	w83781d_write_value(client,
1746	W83781D_REG_BEEP_CONFIG, k & 0xef);
1747	data->pwmenable[1] = 1;
1748	} else {
1749	if(j & 0x08)
1750	w83781d_write_value(client,
1751	W83781D_REG_PWMCLK12, j & 0xf7);
1752	if(!(k & 0x10))
1753	w83781d_write_value(client,
1754	W83781D_REG_BEEP_CONFIG, j \| 0x10);
1755	data->pwmenable[1] = 0;
1756	}
1757	}
1758	}
1759	}
1760
1761	void w83781d_sens(struct i2c_client *client, int operation, int ctl_name,
1762	int nrels_mag, long results)
1763	{
1764	struct w83781d_data *data = client->data;
1765	int nr = 1 + ctl_name - W83781D_SYSCTL_SENS1;
1766	u8 tmp;
1767
1768	if (operation == SENSORS_PROC_REAL_INFO)
1769	*nrels_mag = 0;
1770	else if (operation == SENSORS_PROC_REAL_READ) {
1771	results[0] = data->sens[nr - 1];
1772	*nrels_mag = 1;
1773	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1774	if (*nrels_mag >= 1) {
1775	switch (results[0]) {
1776	case 1: /* PII/Celeron diode */
1777	tmp = w83781d_read_value(client,
1778	W83781D_REG_SCFG1);
1779	w83781d_write_value(client,
1780	W83781D_REG_SCFG1,
1781	tmp \| BIT_SCFG1[nr -
1782	1]);
1783	tmp = w83781d_read_value(client,
1784	W83781D_REG_SCFG2);
1785	w83781d_write_value(client,
1786	W83781D_REG_SCFG2,
1787	tmp \| BIT_SCFG2[nr -
1788	1]);
1789	data->sens[nr - 1] = results[0];
1790	break;
1791	case 2: /* 3904 */
1792	tmp = w83781d_read_value(client,
1793	W83781D_REG_SCFG1);
1794	w83781d_write_value(client,
1795	W83781D_REG_SCFG1,
1796	tmp \| BIT_SCFG1[nr -
1797	1]);
1798	tmp = w83781d_read_value(client,
1799	W83781D_REG_SCFG2);
1800	w83781d_write_value(client,
1801	W83781D_REG_SCFG2,
1802	tmp & ~BIT_SCFG2[nr -
1803	1]);
1804	data->sens[nr - 1] = results[0];
1805	break;
1806	case W83781D_DEFAULT_BETA: /* thermistor */
1807	tmp = w83781d_read_value(client,
1808	W83781D_REG_SCFG1);
1809	w83781d_write_value(client,
1810	W83781D_REG_SCFG1,
1811	tmp & ~BIT_SCFG1[nr -
1812	1]);
1813	data->sens[nr - 1] = results[0];
1814	break;
1815	default:
1816	printk
1817	(KERN_ERR "w83781d.o: Invalid sensor type %ld; must be 1, 2, or %d\n",
1818	results[0], W83781D_DEFAULT_BETA);
1819	break;
1820	}
1821	}
1822	}
1823	}
1824
1825	#ifdef W83781D_RT
1826	static void w83781d_rt(struct i2c_client *client, int operation, int ctl_name,
1827	int nrels_mag, long results)
1828	{
1829	struct w83781d_data *data = client->data;
1830	int nr = 1 + ctl_name - W83781D_SYSCTL_RT1;
1831	int i;
1832
1833	if (operation == SENSORS_PROC_REAL_INFO)
1834	*nrels_mag = 0;
1835	else if (operation == SENSORS_PROC_REAL_READ) {
1836	for (i = 0; i < 32; i++) {
1837	results[i] = data->rt[nr - 1][i];
1838	}
1839	*nrels_mag = 32;
1840	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1841	if (*nrels_mag > 32)
1842	*nrels_mag = 32;
1843	for (i = 0; i < *nrels_mag; i++) {
1844	/* fixme: no bounds checking 0-255 */
1845	data->rt[nr - 1][i] = results[i];
1846	w83781d_write_value(client, W83781D_REG_RT_IDX, i);
1847	w83781d_write_value(client, W83781D_REG_RT_VAL,
1848	data->rt[nr - 1][i]);
1849	}
1850	}
1851	}
1852	#endif
1853
1854	static int __init sm_w83781d_init(void)
1855	{
1856	printk(KERN_INFO "w83781d.o version %s (%s)\n", LM_VERSION, LM_DATE);
1857	return i2c_add_driver(&w83781d_driver);
1858	}
1859
1860	static void __exit sm_w83781d_exit(void)
1861	{
1862	i2c_del_driver(&w83781d_driver);
1863	}
1864
1865
1866
1867	MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1868	"Philip Edelbrock <phil@netroedge.com>, "
1869	"and Mark Studebaker <mdsxyz123@yahoo.com>");
1870	MODULE_DESCRIPTION("W83781D driver");
1871	MODULE_LICENSE("GPL");
1872
1873	module_init(sm_w83781d_init);
1874	module_exit(sm_w83781d_exit);

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