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w83627hf.c @ 1784

Revision 1784, 49.1 KB (checked in by mds, 10 years ago)

Add support for w83627thf. Includes patch from

Matthias Hentges <matthias@…>

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1	/*
2	w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3	monitoring
4	Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>,
5	Philip Edelbrock <phil@netroedge.com>,
6	and Mark Studebaker <mdsxyz123@yahoo.com>
7
8	This program is free software; you can redistribute it and/or modify
9	it under the terms of the GNU General Public License as published by
10	the Free Software Foundation; either version 2 of the License, or
11	(at your option) any later version.
12
13	This program is distributed in the hope that it will be useful,
14	but WITHOUT ANY WARRANTY; without even the implied warranty of
15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16	GNU General Public License for more details.
17
18	You should have received a copy of the GNU General Public License
19	along with this program; if not, write to the Free Software
20	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21	*/
22
23	/*
24	Supports following chips:
25
26	Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27	w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
28	w83627thf 9 2 ? 3 ?? 0x5ca3 no yes(LPC)
29	w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
30
31	For other winbond chips, and for i2c support in the above chips,
32	use w83627hf.c.
33	*/
34
35	#include <linux/module.h>
36	#include <linux/slab.h>
37	#include <linux/proc_fs.h>
38	#include <linux/ioport.h>
39	#include <linux/sysctl.h>
40	#include <linux/types.h>
41	#include <linux/i2c.h>
42	#include <linux/i2c-proc.h>
43	#include <linux/init.h>
44	#include <asm/errno.h>
45	#include <asm/io.h>
46	#include "version.h"
47	#include "sensors_vid.h"
48
49
50	#ifndef I2C_DRIVERID_W83627HF
51	#define I2C_DRIVERID_W83627HF 1038
52	#endif
53
54
55	static int force_addr;
56	MODULE_PARM(force_addr, "i");
57	MODULE_PARM_DESC(force_addr,
58	"Initialize the base address of the sensors");
59	static int force_i2c = 0x1f;
60	MODULE_PARM(force_i2c, "i");
61	MODULE_PARM_DESC(force_i2c,
62	"Initialize the i2c address of the sensors");
63
64	/* Addresses to scan */
65	static unsigned short normal_i2c[] = { SENSORS_I2C_END };
66	static unsigned short normal_i2c_range[] = { SENSORS_I2C_END };
67	static unsigned int normal_isa[] = { 0, SENSORS_ISA_END };
68	static unsigned int normal_isa_range[] = { SENSORS_ISA_END };
69
70	/* Insmod parameters */
71	SENSORS_INSMOD_2(w83627hf, w83697hf);
72
73	static int init = 1;
74	MODULE_PARM(init, "i");
75	MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
76
77	/* modified from kernel/include/traps.c */
78	#define REG 0x2e /* The register to read/write */
79	#define DEV 0x07 /* Register: Logical device select */
80	#define VAL 0x2f /* The value to read/write */
81	#define PME 0x0b /* The device with the hardware monitor */
82	#define DEVID 0x20 /* Register: Device ID */
83
84	static inline void
85	superio_outb(int reg, int val)
86	{
87	outb(reg, REG);
88	outb(val, VAL);
89	}
90
91	static inline int
92	superio_inb(int reg)
93	{
94	outb(reg, REG);
95	return inb(VAL);
96	}
97
98	static inline void
99	superio_select(void)
100	{
101	outb(DEV, REG);
102	outb(PME, VAL);
103	}
104
105	static inline void
106	superio_enter(void)
107	{
108	outb(0x87, REG);
109	outb(0x87, REG);
110	}
111
112	static inline void
113	superio_exit(void)
114	{
115	outb(0xAA, REG);
116	}
117
118	#define W627_DEVID 0x52
119	#define W627THF_DEVID 0x82
120	#define W697_DEVID 0x60
121	#define WINB_ACT_REG 0x30
122	#define WINB_BASE_REG 0x60
123	/* Constants specified below */
124
125	/* Length of ISA address segment */
126	#define WINB_EXTENT 8
127
128	/* Where are the ISA address/data registers relative to the base address */
129	#define W83781D_ADDR_REG_OFFSET 5
130	#define W83781D_DATA_REG_OFFSET 6
131
132	/* The W83781D registers */
133	/* The W83782D registers for nr=7,8 are in bank 5 */
134	#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
135	(0x554 + (((nr) - 7) * 2)))
136	#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
137	(0x555 + (((nr) - 7) * 2)))
138	#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
139	(0x550 + (nr) - 7))
140
141	#define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
142	#define W83781D_REG_FAN(nr) (0x27 + (nr))
143
144	#define W83781D_REG_TEMP2 0x0150
145	#define W83781D_REG_TEMP3 0x0250
146	#define W83781D_REG_TEMP2_HYST 0x153
147	#define W83781D_REG_TEMP3_HYST 0x253
148	#define W83781D_REG_TEMP2_CONFIG 0x152
149	#define W83781D_REG_TEMP3_CONFIG 0x252
150	#define W83781D_REG_TEMP2_OVER 0x155
151	#define W83781D_REG_TEMP3_OVER 0x255
152
153	#define W83781D_REG_TEMP 0x27
154	#define W83781D_REG_TEMP_OVER 0x39
155	#define W83781D_REG_TEMP_HYST 0x3A
156	#define W83781D_REG_BANK 0x4E
157
158	#define W83781D_REG_CONFIG 0x40
159	#define W83781D_REG_ALARM1 0x41
160	#define W83781D_REG_ALARM2 0x42
161	#define W83781D_REG_ALARM3 0x450 /* not on W83781D */
162
163	#define W83781D_REG_IRQ 0x4C
164	#define W83781D_REG_BEEP_CONFIG 0x4D
165	#define W83781D_REG_BEEP_INTS1 0x56
166	#define W83781D_REG_BEEP_INTS2 0x57
167	#define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
168
169	#define W83781D_REG_VID_FANDIV 0x47
170
171	#define W83781D_REG_CHIPID 0x49
172	#define W83781D_REG_WCHIPID 0x58
173	#define W83781D_REG_CHIPMAN 0x4F
174	#define W83781D_REG_PIN 0x4B
175
176	/* 782D/783S only */
177	#define W83781D_REG_VBAT 0x5D
178
179	/* PWM 782D (1-4) and 783S (1-2) only */
180	#define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
181	/* on which is which; */
182	#define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
183	/* However 782d is probably wrong. */
184	#define W83781D_REG_PWM3 0x5E
185	#define W83781D_REG_PWM4 0x5F
186	#define W83781D_REG_PWMCLK12 0x5C
187	#define W83781D_REG_PWMCLK34 0x45C
188	static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
189	W83781D_REG_PWM3, W83781D_REG_PWM4
190	};
191	#define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
192
193	#define W83781D_REG_I2C_ADDR 0x48
194	#define W83781D_REG_I2C_SUBADDR 0x4A
195
196	/* The following are undocumented in the data sheets however we
197	received the information in an email from Winbond tech support */
198	/* Sensor selection - not on 781d */
199	#define W83781D_REG_SCFG1 0x5D
200	static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
201	#define W83781D_REG_SCFG2 0x59
202	static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
203	#define W83781D_DEFAULT_BETA 3435
204
205	/* RT Table registers */
206	#define W83781D_REG_RT_IDX 0x50
207	#define W83781D_REG_RT_VAL 0x51
208
209	/* Conversions. Rounding and limit checking is only done on the TO_REG
210	variants. Note that you should be a bit careful with which arguments
211	these macros are called: arguments may be evaluated more than once.
212	Fixing this is just not worth it. */
213	#define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
214	#define IN_FROM_REG(val) (((val) * 16) / 10)
215
216	static inline u8 FAN_TO_REG(long rpm, int div)
217	{
218	if (rpm == 0)
219	return 255;
220	rpm = SENSORS_LIMIT(rpm, 1, 1000000);
221	return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
222	254);
223	}
224
225	#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
226
227	#define TEMP_TO_REG(val) (SENSORS_LIMIT(((val)<0?(((val)-5)/10):\
228	((val)+5)/10),0,255))
229	#define TEMP_FROM_REG(val) (((val)>0x80?(val)-0x100:(val))*10)
230
231	#define TEMP_ADD_TO_REG(val) (SENSORS_LIMIT(((((val) + 2) / 5) << 7),\
232	0,0xffff))
233	#define TEMP_ADD_FROM_REG(val) (((val) >> 7) * 5)
234
235	#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
236	#define BEEPS_TO_REG(val) ((val) & 0xffffff)
237
238	#define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
239	#define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
240
241	#define DIV_FROM_REG(val) (1 << (val))
242
243	static inline u8 DIV_TO_REG(long val)
244	{
245	int i;
246	val = SENSORS_LIMIT(val, 1, 128) >> 1;
247	for (i = 0; i < 6; i++) {
248	if (val == 0)
249	break;
250	val >>= 1;
251	}
252	return ((u8) i);
253	}
254
255	/* Initial limits */
256	#define W83781D_INIT_IN_0 (vid==3500?280:vid/10)
257	#define W83781D_INIT_IN_1 (vid==3500?280:vid/10)
258	#define W83781D_INIT_IN_2 330
259	#define W83781D_INIT_IN_3 (((500) * 100)/168)
260	#define W83781D_INIT_IN_4 (((1200) * 10)/38)
261	#define W83781D_INIT_IN_5 (((-1200) * -604)/2100)
262	#define W83781D_INIT_IN_6 (((-500) * -604)/909)
263	#define W83781D_INIT_IN_7 (((500) * 100)/168)
264	#define W83781D_INIT_IN_8 300
265	/* Initial limits for 782d/783s negative voltages */
266	/* Note level shift. Change min/max below if you change these. */
267	#define W83782D_INIT_IN_5 ((((-1200) + 1491) * 100)/514)
268	#define W83782D_INIT_IN_6 ((( (-500) + 771) * 100)/314)
269
270	#define W83781D_INIT_IN_PERCENTAGE 10
271
272	#define W83781D_INIT_IN_MIN_0 \
273	(W83781D_INIT_IN_0 - W83781D_INIT_IN_0 * W83781D_INIT_IN_PERCENTAGE \
274	/ 100)
275	#define W83781D_INIT_IN_MAX_0 \
276	(W83781D_INIT_IN_0 + W83781D_INIT_IN_0 * W83781D_INIT_IN_PERCENTAGE \
277	/ 100)
278	#define W83781D_INIT_IN_MIN_1 \
279	(W83781D_INIT_IN_1 - W83781D_INIT_IN_1 * W83781D_INIT_IN_PERCENTAGE \
280	/ 100)
281	#define W83781D_INIT_IN_MAX_1 \
282	(W83781D_INIT_IN_1 + W83781D_INIT_IN_1 * W83781D_INIT_IN_PERCENTAGE \
283	/ 100)
284	#define W83781D_INIT_IN_MIN_2 \
285	(W83781D_INIT_IN_2 - W83781D_INIT_IN_2 * W83781D_INIT_IN_PERCENTAGE \
286	/ 100)
287	#define W83781D_INIT_IN_MAX_2 \
288	(W83781D_INIT_IN_2 + W83781D_INIT_IN_2 * W83781D_INIT_IN_PERCENTAGE \
289	/ 100)
290	#define W83781D_INIT_IN_MIN_3 \
291	(W83781D_INIT_IN_3 - W83781D_INIT_IN_3 * W83781D_INIT_IN_PERCENTAGE \
292	/ 100)
293	#define W83781D_INIT_IN_MAX_3 \
294	(W83781D_INIT_IN_3 + W83781D_INIT_IN_3 * W83781D_INIT_IN_PERCENTAGE \
295	/ 100)
296	#define W83781D_INIT_IN_MIN_4 \
297	(W83781D_INIT_IN_4 - W83781D_INIT_IN_4 * W83781D_INIT_IN_PERCENTAGE \
298	/ 100)
299	#define W83781D_INIT_IN_MAX_4 \
300	(W83781D_INIT_IN_4 + W83781D_INIT_IN_4 * W83781D_INIT_IN_PERCENTAGE \
301	/ 100)
302	#define W83781D_INIT_IN_MIN_5 \
303	(W83781D_INIT_IN_5 - W83781D_INIT_IN_5 * W83781D_INIT_IN_PERCENTAGE \
304	/ 100)
305	#define W83781D_INIT_IN_MAX_5 \
306	(W83781D_INIT_IN_5 + W83781D_INIT_IN_5 * W83781D_INIT_IN_PERCENTAGE \
307	/ 100)
308	#define W83781D_INIT_IN_MIN_6 \
309	(W83781D_INIT_IN_6 - W83781D_INIT_IN_6 * W83781D_INIT_IN_PERCENTAGE \
310	/ 100)
311	#define W83781D_INIT_IN_MAX_6 \
312	(W83781D_INIT_IN_6 + W83781D_INIT_IN_6 * W83781D_INIT_IN_PERCENTAGE \
313	/ 100)
314	#define W83781D_INIT_IN_MIN_7 \
315	(W83781D_INIT_IN_7 - W83781D_INIT_IN_7 * W83781D_INIT_IN_PERCENTAGE \
316	/ 100)
317	#define W83781D_INIT_IN_MAX_7 \
318	(W83781D_INIT_IN_7 + W83781D_INIT_IN_7 * W83781D_INIT_IN_PERCENTAGE \
319	/ 100)
320	#define W83781D_INIT_IN_MIN_8 \
321	(W83781D_INIT_IN_8 - W83781D_INIT_IN_8 * W83781D_INIT_IN_PERCENTAGE \
322	/ 100)
323	#define W83781D_INIT_IN_MAX_8 \
324	(W83781D_INIT_IN_8 + W83781D_INIT_IN_8 * W83781D_INIT_IN_PERCENTAGE \
325	/ 100)
326	/* Initial limits for 782d/783s negative voltages */
327	/* These aren't direct multiples because of level shift */
328	/* Beware going negative - check */
329	#define W83782D_INIT_IN_MIN_5_TMP \
330	(((-1200 * (100 + W83781D_INIT_IN_PERCENTAGE)) + (1491 * 100))/514)
331	#define W83782D_INIT_IN_MIN_5 \
332	((W83782D_INIT_IN_MIN_5_TMP > 0) ? W83782D_INIT_IN_MIN_5_TMP : 0)
333	#define W83782D_INIT_IN_MAX_5 \
334	(((-1200 * (100 - W83781D_INIT_IN_PERCENTAGE)) + (1491 * 100))/514)
335	#define W83782D_INIT_IN_MIN_6_TMP \
336	((( -500 * (100 + W83781D_INIT_IN_PERCENTAGE)) + (771 * 100))/314)
337	#define W83782D_INIT_IN_MIN_6 \
338	((W83782D_INIT_IN_MIN_6_TMP > 0) ? W83782D_INIT_IN_MIN_6_TMP : 0)
339	#define W83782D_INIT_IN_MAX_6 \
340	((( -500 * (100 - W83781D_INIT_IN_PERCENTAGE)) + (771 * 100))/314)
341
342	#define W83781D_INIT_FAN_MIN_1 3000
343	#define W83781D_INIT_FAN_MIN_2 3000
344	#define W83781D_INIT_FAN_MIN_3 3000
345
346	#define W83781D_INIT_TEMP_OVER 600
347	#define W83781D_INIT_TEMP_HYST 1270 /* must be 127 for ALARM to work */
348	#define W83781D_INIT_TEMP2_OVER 600
349	#define W83781D_INIT_TEMP2_HYST 500
350	#define W83781D_INIT_TEMP3_OVER 600
351	#define W83781D_INIT_TEMP3_HYST 500
352
353	/* There are some complications in a module like this. First off, W83781D chips
354	may be both present on the SMBus and the ISA bus, and we have to handle
355	those cases separately at some places. Second, there might be several
356	W83781D chips available (well, actually, that is probably never done; but
357	it is a clean illustration of how to handle a case like that). Finally,
358	a specific chip may be attached to both ISA and SMBus, and we would
359	not like to detect it double. Fortunately, in the case of the W83781D at
360	least, a register tells us what SMBus address we are on, so that helps
361	a bit - except if there could be more than one SMBus. Groan. No solution
362	for this yet. */
363
364	/* This module may seem overly long and complicated. In fact, it is not so
365	bad. Quite a lot of bookkeeping is done. A real driver can often cut
366	some corners. */
367
368	/* For each registered W83781D, we need to keep some data in memory. That
369	data is pointed to by w83627hf_list[NR]->data. The structure itself is
370	dynamically allocated, at the same time when a new w83627hf client is
371	allocated. */
372	struct w83627hf_data {
373	struct semaphore lock;
374	int sysctl_id;
375	enum chips type;
376
377	struct semaphore update_lock;
378	char valid; /* !=0 if following fields are valid */
379	unsigned long last_updated; /* In jiffies */
380
381	struct i2c_client lm75; / for secondary I2C addresses */
382	/* pointer to array of 2 subclients */
383
384	u8 in[9]; /* Register value - 8 & 9 for 782D only */
385	u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
386	u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
387	u8 fan[3]; /* Register value */
388	u8 fan_min[3]; /* Register value */
389	u8 temp;
390	u8 temp_over; /* Register value */
391	u8 temp_hyst; /* Register value */
392	u16 temp_add[2]; /* Register value */
393	u16 temp_add_over[2]; /* Register value */
394	u16 temp_add_hyst[2]; /* Register value */
395	u8 fan_div[3]; /* Register encoding, shifted right */
396	u8 vid; /* Register encoding, combined */
397	u32 alarms; /* Register encoding, combined */
398	u32 beeps; /* Register encoding, combined */
399	u8 beep_enable; /* Boolean */
400	u8 pwm[2]; /* Register value */
401	u8 pwmenable[2]; /* bool */
402	u16 sens[3]; /* 782D/783S only.
403	1 = pentium diode; 2 = 3904 diode;
404	3000-5000 = thermistor beta.
405	Default = 3435.
406	Other Betas unimplemented */
407	u8 vrm;
408	};
409
410
411	static int w83627hf_attach_adapter(struct i2c_adapter *adapter);
412	static int w83627hf_detect(struct i2c_adapter *adapter, int address,
413	unsigned short flags, int kind);
414	static int w83627hf_detach_client(struct i2c_client *client);
415
416	static int w83627hf_read_value(struct i2c_client *client, u16 register);
417	static int w83627hf_write_value(struct i2c_client *client, u16 register,
418	u16 value);
419	static void w83627hf_update_client(struct i2c_client *client);
420	static void w83627hf_init_client(struct i2c_client *client);
421
422
423	static void w83627hf_in(struct i2c_client *client, int operation,
424	int ctl_name, int nrels_mag, long results);
425	static void w83627hf_fan(struct i2c_client *client, int operation,
426	int ctl_name, int nrels_mag, long results);
427	static void w83627hf_temp(struct i2c_client *client, int operation,
428	int ctl_name, int nrels_mag, long results);
429	static void w83627hf_temp_add(struct i2c_client *client, int operation,
430	int ctl_name, int nrels_mag, long results);
431	static void w83627hf_vid(struct i2c_client *client, int operation,
432	int ctl_name, int nrels_mag, long results);
433	static void w83627hf_vrm(struct i2c_client *client, int operation,
434	int ctl_name, int nrels_mag, long results);
435	static void w83627hf_alarms(struct i2c_client *client, int operation,
436	int ctl_name, int nrels_mag, long results);
437	static void w83627hf_beep(struct i2c_client *client, int operation,
438	int ctl_name, int nrels_mag, long results);
439	static void w83627hf_fan_div(struct i2c_client *client, int operation,
440	int ctl_name, int nrels_mag, long results);
441	static void w83627hf_pwm(struct i2c_client *client, int operation,
442	int ctl_name, int nrels_mag, long results);
443	static void w83627hf_sens(struct i2c_client *client, int operation,
444	int ctl_name, int nrels_mag, long results);
445
446	static int w83627hf_id = 0;
447
448	static struct i2c_driver w83627hf_driver = {
449	.owner = THIS_MODULE,
450	.name = "W83781D sensor driver",
451	.id = I2C_DRIVERID_W83627HF,
452	.flags = I2C_DF_NOTIFY,
453	.attach_adapter = w83627hf_attach_adapter,
454	.detach_client = w83627hf_detach_client,
455	};
456
457	/* The /proc/sys entries */
458
459	/* -- SENSORS SYSCTL START -- */
460
461	#define W83781D_SYSCTL_IN0 1000 /* Volts * 100 */
462	#define W83781D_SYSCTL_IN1 1001
463	#define W83781D_SYSCTL_IN2 1002
464	#define W83781D_SYSCTL_IN3 1003
465	#define W83781D_SYSCTL_IN4 1004
466	#define W83781D_SYSCTL_IN5 1005
467	#define W83781D_SYSCTL_IN6 1006
468	#define W83781D_SYSCTL_IN7 1007
469	#define W83781D_SYSCTL_IN8 1008
470	#define W83781D_SYSCTL_FAN1 1101 /* Rotations/min */
471	#define W83781D_SYSCTL_FAN2 1102
472	#define W83781D_SYSCTL_FAN3 1103
473	#define W83781D_SYSCTL_TEMP1 1200 /* Degrees Celcius * 10 */
474	#define W83781D_SYSCTL_TEMP2 1201 /* Degrees Celcius * 10 */
475	#define W83781D_SYSCTL_TEMP3 1202 /* Degrees Celcius * 10 */
476	#define W83781D_SYSCTL_VID 1300 /* Volts * 1000 */
477	#define W83781D_SYSCTL_VRM 1301
478	#define W83781D_SYSCTL_PWM1 1401
479	#define W83781D_SYSCTL_PWM2 1402
480	#define W83781D_SYSCTL_PWM3 1403
481	#define W83781D_SYSCTL_PWM4 1404
482	#define W83781D_SYSCTL_SENS1 1501 /* 1, 2, or Beta (3000-5000) */
483	#define W83781D_SYSCTL_SENS2 1502
484	#define W83781D_SYSCTL_SENS3 1503
485	#define W83781D_SYSCTL_RT1 1601 /* 32-entry table */
486	#define W83781D_SYSCTL_RT2 1602 /* 32-entry table */
487	#define W83781D_SYSCTL_RT3 1603 /* 32-entry table */
488	#define W83781D_SYSCTL_FAN_DIV 2000 /* 1, 2, 4 or 8 */
489	#define W83781D_SYSCTL_ALARMS 2001 /* bitvector */
490	#define W83781D_SYSCTL_BEEP 2002 /* bitvector */
491
492	#define W83781D_ALARM_IN0 0x0001
493	#define W83781D_ALARM_IN1 0x0002
494	#define W83781D_ALARM_IN2 0x0004
495	#define W83781D_ALARM_IN3 0x0008
496	#define W83781D_ALARM_IN4 0x0100
497	#define W83781D_ALARM_IN5 0x0200
498	#define W83781D_ALARM_IN6 0x0400
499	#define W83782D_ALARM_IN7 0x10000
500	#define W83782D_ALARM_IN8 0x20000
501	#define W83781D_ALARM_FAN1 0x0040
502	#define W83781D_ALARM_FAN2 0x0080
503	#define W83781D_ALARM_FAN3 0x0800
504	#define W83781D_ALARM_TEMP1 0x0010
505	#define W83781D_ALARM_TEMP23 0x0020 /* 781D only */
506	#define W83781D_ALARM_TEMP2 0x0020 /* 782D/783S */
507	#define W83781D_ALARM_TEMP3 0x2000 /* 782D only */
508	#define W83781D_ALARM_CHAS 0x1000
509
510	/* -- SENSORS SYSCTL END -- */
511
512	/* These files are created for each detected chip. This is just a template;
513	though at first sight, you might think we could use a statically
514	allocated list, we need some way to get back to the parent - which
515	is done through one of the 'extra' fields which are initialized
516	when a new copy is allocated. */
517
518
519	/* without pwm3-4 */
520	static ctl_table w83782d_isa_dir_table_template[] = {
521	{W83781D_SYSCTL_IN0, "in0", NULL, 0, 0644, NULL, &i2c_proc_real,
522	&i2c_sysctl_real, NULL, &w83627hf_in},
523	{W83781D_SYSCTL_IN1, "in1", NULL, 0, 0644, NULL, &i2c_proc_real,
524	&i2c_sysctl_real, NULL, &w83627hf_in},
525	{W83781D_SYSCTL_IN2, "in2", NULL, 0, 0644, NULL, &i2c_proc_real,
526	&i2c_sysctl_real, NULL, &w83627hf_in},
527	{W83781D_SYSCTL_IN3, "in3", NULL, 0, 0644, NULL, &i2c_proc_real,
528	&i2c_sysctl_real, NULL, &w83627hf_in},
529	{W83781D_SYSCTL_IN4, "in4", NULL, 0, 0644, NULL, &i2c_proc_real,
530	&i2c_sysctl_real, NULL, &w83627hf_in},
531	{W83781D_SYSCTL_IN5, "in5", NULL, 0, 0644, NULL, &i2c_proc_real,
532	&i2c_sysctl_real, NULL, &w83627hf_in},
533	{W83781D_SYSCTL_IN6, "in6", NULL, 0, 0644, NULL, &i2c_proc_real,
534	&i2c_sysctl_real, NULL, &w83627hf_in},
535	{W83781D_SYSCTL_IN7, "in7", NULL, 0, 0644, NULL, &i2c_proc_real,
536	&i2c_sysctl_real, NULL, &w83627hf_in},
537	{W83781D_SYSCTL_IN8, "in8", NULL, 0, 0644, NULL, &i2c_proc_real,
538	&i2c_sysctl_real, NULL, &w83627hf_in},
539	{W83781D_SYSCTL_FAN1, "fan1", NULL, 0, 0644, NULL, &i2c_proc_real,
540	&i2c_sysctl_real, NULL, &w83627hf_fan},
541	{W83781D_SYSCTL_FAN2, "fan2", NULL, 0, 0644, NULL, &i2c_proc_real,
542	&i2c_sysctl_real, NULL, &w83627hf_fan},
543	{W83781D_SYSCTL_FAN3, "fan3", NULL, 0, 0644, NULL, &i2c_proc_real,
544	&i2c_sysctl_real, NULL, &w83627hf_fan},
545	{W83781D_SYSCTL_TEMP1, "temp1", NULL, 0, 0644, NULL, &i2c_proc_real,
546	&i2c_sysctl_real, NULL, &w83627hf_temp},
547	{W83781D_SYSCTL_TEMP2, "temp2", NULL, 0, 0644, NULL, &i2c_proc_real,
548	&i2c_sysctl_real, NULL, &w83627hf_temp_add},
549	{W83781D_SYSCTL_TEMP3, "temp3", NULL, 0, 0644, NULL, &i2c_proc_real,
550	&i2c_sysctl_real, NULL, &w83627hf_temp_add},
551	{W83781D_SYSCTL_VID, "vid", NULL, 0, 0444, NULL, &i2c_proc_real,
552	&i2c_sysctl_real, NULL, &w83627hf_vid},
553	{W83781D_SYSCTL_VRM, "vrm", NULL, 0, 0644, NULL, &i2c_proc_real,
554	&i2c_sysctl_real, NULL, &w83627hf_vrm},
555	{W83781D_SYSCTL_FAN_DIV, "fan_div", NULL, 0, 0644, NULL, &i2c_proc_real,
556	&i2c_sysctl_real, NULL, &w83627hf_fan_div},
557	{W83781D_SYSCTL_ALARMS, "alarms", NULL, 0, 0444, NULL, &i2c_proc_real,
558	&i2c_sysctl_real, NULL, &w83627hf_alarms},
559	{W83781D_SYSCTL_BEEP, "beep", NULL, 0, 0644, NULL, &i2c_proc_real,
560	&i2c_sysctl_real, NULL, &w83627hf_beep},
561	{W83781D_SYSCTL_PWM1, "pwm1", NULL, 0, 0644, NULL, &i2c_proc_real,
562	&i2c_sysctl_real, NULL, &w83627hf_pwm},
563	{W83781D_SYSCTL_PWM2, "pwm2", NULL, 0, 0644, NULL, &i2c_proc_real,
564	&i2c_sysctl_real, NULL, &w83627hf_pwm},
565	{W83781D_SYSCTL_SENS1, "sensor1", NULL, 0, 0644, NULL, &i2c_proc_real,
566	&i2c_sysctl_real, NULL, &w83627hf_sens},
567	{W83781D_SYSCTL_SENS2, "sensor2", NULL, 0, 0644, NULL, &i2c_proc_real,
568	&i2c_sysctl_real, NULL, &w83627hf_sens},
569	{W83781D_SYSCTL_SENS3, "sensor3", NULL, 0, 0644, NULL, &i2c_proc_real,
570	&i2c_sysctl_real, NULL, &w83627hf_sens},
571	{0}
572	};
573
574	/* similar to w83782d but no fan3, no vid */
575	static ctl_table w83697hf_dir_table_template[] = {
576	{W83781D_SYSCTL_IN0, "in0", NULL, 0, 0644, NULL, &i2c_proc_real,
577	&i2c_sysctl_real, NULL, &w83627hf_in},
578	/* no in1 to maintain compatibility with 781d and 782d. */
579	{W83781D_SYSCTL_IN2, "in2", NULL, 0, 0644, NULL, &i2c_proc_real,
580	&i2c_sysctl_real, NULL, &w83627hf_in},
581	{W83781D_SYSCTL_IN3, "in3", NULL, 0, 0644, NULL, &i2c_proc_real,
582	&i2c_sysctl_real, NULL, &w83627hf_in},
583	{W83781D_SYSCTL_IN4, "in4", NULL, 0, 0644, NULL, &i2c_proc_real,
584	&i2c_sysctl_real, NULL, &w83627hf_in},
585	{W83781D_SYSCTL_IN5, "in5", NULL, 0, 0644, NULL, &i2c_proc_real,
586	&i2c_sysctl_real, NULL, &w83627hf_in},
587	{W83781D_SYSCTL_IN6, "in6", NULL, 0, 0644, NULL, &i2c_proc_real,
588	&i2c_sysctl_real, NULL, &w83627hf_in},
589	{W83781D_SYSCTL_IN7, "in7", NULL, 0, 0644, NULL, &i2c_proc_real,
590	&i2c_sysctl_real, NULL, &w83627hf_in},
591	{W83781D_SYSCTL_IN8, "in8", NULL, 0, 0644, NULL, &i2c_proc_real,
592	&i2c_sysctl_real, NULL, &w83627hf_in},
593	{W83781D_SYSCTL_FAN1, "fan1", NULL, 0, 0644, NULL, &i2c_proc_real,
594	&i2c_sysctl_real, NULL, &w83627hf_fan},
595	{W83781D_SYSCTL_FAN2, "fan2", NULL, 0, 0644, NULL, &i2c_proc_real,
596	&i2c_sysctl_real, NULL, &w83627hf_fan},
597	{W83781D_SYSCTL_TEMP1, "temp1", NULL, 0, 0644, NULL, &i2c_proc_real,
598	&i2c_sysctl_real, NULL, &w83627hf_temp},
599	{W83781D_SYSCTL_TEMP2, "temp2", NULL, 0, 0644, NULL, &i2c_proc_real,
600	&i2c_sysctl_real, NULL, &w83627hf_temp_add},
601	{W83781D_SYSCTL_FAN_DIV, "fan_div", NULL, 0, 0644, NULL, &i2c_proc_real,
602	&i2c_sysctl_real, NULL, &w83627hf_fan_div},
603	{W83781D_SYSCTL_ALARMS, "alarms", NULL, 0, 0444, NULL, &i2c_proc_real,
604	&i2c_sysctl_real, NULL, &w83627hf_alarms},
605	{W83781D_SYSCTL_BEEP, "beep", NULL, 0, 0644, NULL, &i2c_proc_real,
606	&i2c_sysctl_real, NULL, &w83627hf_beep},
607	{W83781D_SYSCTL_PWM1, "pwm1", NULL, 0, 0644, NULL, &i2c_proc_real,
608	&i2c_sysctl_real, NULL, &w83627hf_pwm},
609	{W83781D_SYSCTL_PWM2, "pwm2", NULL, 0, 0644, NULL, &i2c_proc_real,
610	&i2c_sysctl_real, NULL, &w83627hf_pwm},
611	{W83781D_SYSCTL_SENS1, "sensor1", NULL, 0, 0644, NULL, &i2c_proc_real,
612	&i2c_sysctl_real, NULL, &w83627hf_sens},
613	{W83781D_SYSCTL_SENS2, "sensor2", NULL, 0, 0644, NULL, &i2c_proc_real,
614	&i2c_sysctl_real, NULL, &w83627hf_sens},
615	{0}
616	};
617
618
619	/* This function is called when:
620	* w83627hf_driver is inserted (when this module is loaded), for each
621	available adapter
622	* when a new adapter is inserted (and w83627hf_driver is still present) */
623	static int w83627hf_attach_adapter(struct i2c_adapter *adapter)
624	{
625	return i2c_detect(adapter, &addr_data, w83627hf_detect);
626	}
627
628	static int w83627hf_find(int *address)
629	{
630	u16 val;
631
632	superio_enter();
633	val= superio_inb(DEVID);
634	if(val != W627_DEVID && val !=W627THF_DEVID && val != W697_DEVID) {
635	superio_exit();
636	return -ENODEV;
637	}
638
639	superio_select();
640	val = (superio_inb(WINB_BASE_REG) << 8) \|
641	superio_inb(WINB_BASE_REG + 1);
642	*address = val & ~(WINB_EXTENT - 1);
643	if (*address == 0 && force_addr == 0) {
644	printk("vt1211.o: base address not set - use force_addr=0xaddr\n");
645	superio_exit();
646	return -ENODEV;
647	}
648	if (force_addr)
649	address = force_addr; / so detect will get called */
650
651	superio_exit();
652	return 0;
653	}
654
655	int w83627hf_detect(struct i2c_adapter *adapter, int address,
656	unsigned short flags, int kind)
657	{
658	int i, val, id;
659	struct i2c_client *new_client;
660	struct w83627hf_data *data;
661	int err = 0;
662	const char *type_name = "";
663	const char *client_name = "";
664	enum vendor { winbond, asus } vendid;
665
666	if (!i2c_is_isa_adapter(adapter))
667	return 0;
668
669	if(force_addr)
670	address = force_addr & ~(WINB_EXTENT - 1);
671	if (check_region(address, WINB_EXTENT)) {
672	printk("vt1211.o: region 0x%x already in use!\n", address);
673	return -ENODEV;
674	}
675	if(force_addr) {
676	printk("vt1211.o: forcing ISA address 0x%04X\n", address);
677	superio_enter();
678	superio_select();
679	superio_outb(WINB_BASE_REG, address >> 8);
680	superio_outb(WINB_BASE_REG+1, address & 0xff);
681	superio_exit();
682	}
683
684	superio_enter();
685	val= superio_inb(DEVID);
686	if(val == W627_DEVID)
687	kind = w83627hf;
688	else if(val == W697_DEVID)
689	kind = w83697hf;
690	else if(val == W627THF_DEVID)
691	kind = w83627hf;
692
693	superio_select();
694	if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
695	superio_outb(WINB_ACT_REG, 1);
696	superio_exit();
697
698	/* OK. For now, we presume we have a valid client. We now create the
699	client structure, even though we cannot fill it completely yet.
700	But it allows us to access w83627hf_{read,write}_value. */
701
702	if (!(new_client = kmalloc(sizeof(struct i2c_client) +
703	sizeof(struct w83627hf_data),
704	GFP_KERNEL))) {
705	err = -ENOMEM;
706	goto ERROR0;
707	}
708
709	data = (struct w83627hf_data *) (new_client + 1);
710	new_client->addr = address;
711	init_MUTEX(&data->lock);
712	new_client->data = data;
713	new_client->adapter = adapter;
714	new_client->driver = &w83627hf_driver;
715	new_client->flags = 0;
716
717
718	if (kind == w83627hf) {
719	type_name = "w83627hf";
720	client_name = "W83627HF chip";
721	} else if (kind == w83697hf) {
722	type_name = "w83697hf";
723	client_name = "W83697HF chip";
724	} else {
725	goto ERROR1;
726	}
727
728	request_region(address, WINB_EXTENT, type_name);
729
730	/* Fill in the remaining client fields and put it into the global list */
731	strcpy(new_client->name, client_name);
732	data->type = kind;
733	new_client->id = w83627hf_id++;
734	data->valid = 0;
735	init_MUTEX(&data->update_lock);
736
737	/* Tell the I2C layer a new client has arrived */
738	if ((err = i2c_attach_client(new_client)))
739	goto ERROR3;
740
741	data->lm75 = NULL;
742
743	/* Register a new directory entry with module sensors */
744	if ((i = i2c_register_entry(new_client,
745	type_name,
746	(kind == w83697hf) ?
747	w83697hf_dir_table_template :
748	w83782d_isa_dir_table_template)) < 0) {
749	err = i;
750	goto ERROR7;
751	}
752	data->sysctl_id = i;
753
754	/* Initialize the chip */
755	w83627hf_init_client(new_client);
756	return 0;
757
758	/* OK, this is not exactly good programming practice, usually. But it is
759	very code-efficient in this case. */
760
761	ERROR7:
762	i2c_detach_client(new_client);
763	ERROR3:
764	release_region(address, WINB_EXTENT);
765	ERROR1:
766	kfree(new_client);
767	ERROR0:
768	return err;
769	}
770
771	static int w83627hf_detach_client(struct i2c_client *client)
772	{
773	int err;
774
775	i2c_deregister_entry(((struct w83627hf_data *) (client->data))->
776	sysctl_id);
777
778	if ((err = i2c_detach_client(client))) {
779	printk
780	(KERN_ERR "w83627hf.o: Client deregistration failed, client not detached.\n");
781	return err;
782	}
783
784	release_region(client->addr, WINB_EXTENT);
785	kfree(client);
786
787	return 0;
788	}
789
790
791	/*
792	ISA access must always be locked explicitly!
793	We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
794	would slow down the W83781D access and should not be necessary.
795	There are some ugly typecasts here, but the good news is - they should
796	nowhere else be necessary! */
797	static int w83627hf_read_value(struct i2c_client *client, u16 reg)
798	{
799	int res, word_sized, bank;
800	struct i2c_client *cl;
801
802	down(&(((struct w83627hf_data *) (client->data))->lock));
803	word_sized = (((reg & 0xff00) == 0x100)
804	\|\| ((reg & 0xff00) == 0x200))
805	&& (((reg & 0x00ff) == 0x50)
806	\|\| ((reg & 0x00ff) == 0x53)
807	\|\| ((reg & 0x00ff) == 0x55));
808	if (reg & 0xff00) {
809	outb_p(W83781D_REG_BANK,
810	client->addr + W83781D_ADDR_REG_OFFSET);
811	outb_p(reg >> 8,
812	client->addr + W83781D_DATA_REG_OFFSET);
813	}
814	outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
815	res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
816	if (word_sized) {
817	outb_p((reg & 0xff) + 1,
818	client->addr + W83781D_ADDR_REG_OFFSET);
819	res =
820	(res << 8) + inb_p(client->addr +
821	W83781D_DATA_REG_OFFSET);
822	}
823	if (reg & 0xff00) {
824	outb_p(W83781D_REG_BANK,
825	client->addr + W83781D_ADDR_REG_OFFSET);
826	outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
827	}
828	up(&(((struct w83627hf_data *) (client->data))->lock));
829	return res;
830	}
831
832	static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
833	{
834	int word_sized, bank;
835	struct i2c_client *cl;
836
837	down(&(((struct w83627hf_data *) (client->data))->lock));
838	word_sized = (((reg & 0xff00) == 0x100)
839	\|\| ((reg & 0xff00) == 0x200))
840	&& (((reg & 0x00ff) == 0x53)
841	\|\| ((reg & 0x00ff) == 0x55));
842	if (reg & 0xff00) {
843	outb_p(W83781D_REG_BANK,
844	client->addr + W83781D_ADDR_REG_OFFSET);
845	outb_p(reg >> 8,
846	client->addr + W83781D_DATA_REG_OFFSET);
847	}
848	outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
849	if (word_sized) {
850	outb_p(value >> 8,
851	client->addr + W83781D_DATA_REG_OFFSET);
852	outb_p((reg & 0xff) + 1,
853	client->addr + W83781D_ADDR_REG_OFFSET);
854	}
855	outb_p(value & 0xff,
856	client->addr + W83781D_DATA_REG_OFFSET);
857	if (reg & 0xff00) {
858	outb_p(W83781D_REG_BANK,
859	client->addr + W83781D_ADDR_REG_OFFSET);
860	outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
861	}
862	up(&(((struct w83627hf_data *) (client->data))->lock));
863	return 0;
864	}
865
866	/* Called when we have found a new W83781D. It should set limits, etc. */
867	static void w83627hf_init_client(struct i2c_client *client)
868	{
869	struct w83627hf_data *data = client->data;
870	int vid = 0, i;
871	int type = data->type;
872	u8 tmp;
873
874	if(init) {
875	/* save this register */
876	i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
877	/* Reset all except Watchdog values and last conversion values
878	This sets fan-divs to 2, among others */
879	w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
880	/* Restore the register and disable power-on abnormal beep.
881	This saves FAN 1/2/3 input/output values set by BIOS. */
882	w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i \| 0x80);
883	/* Disable master beep-enable (reset turns it on).
884	Individual beeps should be reset to off but for some reason
885	disabling this bit helps some people not get beeped */
886	w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
887	}
888
889	/* Minimize conflicts with other winbond i2c-only clients... */
890	/* disable i2c subclients... how to disable main i2c client?? */
891	/* force i2c address to relatively uncommon address */
892	w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
893	w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
894
895	if (type != w83697hf) {
896	vid = w83627hf_read_value(client, W83781D_REG_VID_FANDIV) & 0x0f;
897	vid \|=
898	(w83627hf_read_value(client, W83781D_REG_CHIPID) & 0x01) << 4;
899	data->vrm = DEFAULT_VRM;
900	vid = vid_from_reg(vid, data->vrm);
901	}
902
903	tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
904	for (i = 1; i <= 3; i++) {
905	if (!(tmp & BIT_SCFG1[i - 1])) {
906	data->sens[i - 1] = W83781D_DEFAULT_BETA;
907	} else {
908	if (w83627hf_read_value
909	(client,
910	W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
911	data->sens[i - 1] = 1;
912	else
913	data->sens[i - 1] = 2;
914	}
915	if ((type == w83697hf) && (i == 2))
916	break;
917	}
918
919	data->pwmenable[0] = 1;
920	data->pwmenable[1] = 1;
921
922	if(init) {
923	w83627hf_write_value(client, W83781D_REG_IN_MIN(0),
924	IN_TO_REG(W83781D_INIT_IN_MIN_0));
925	w83627hf_write_value(client, W83781D_REG_IN_MAX(0),
926	IN_TO_REG(W83781D_INIT_IN_MAX_0));
927	if (type != w83697hf) {
928	w83627hf_write_value(client, W83781D_REG_IN_MIN(1),
929	IN_TO_REG(W83781D_INIT_IN_MIN_1));
930	w83627hf_write_value(client, W83781D_REG_IN_MAX(1),
931	IN_TO_REG(W83781D_INIT_IN_MAX_1));
932	}
933
934	w83627hf_write_value(client, W83781D_REG_IN_MIN(2),
935	IN_TO_REG(W83781D_INIT_IN_MIN_2));
936	w83627hf_write_value(client, W83781D_REG_IN_MAX(2),
937	IN_TO_REG(W83781D_INIT_IN_MAX_2));
938	w83627hf_write_value(client, W83781D_REG_IN_MIN(3),
939	IN_TO_REG(W83781D_INIT_IN_MIN_3));
940	w83627hf_write_value(client, W83781D_REG_IN_MAX(3),
941	IN_TO_REG(W83781D_INIT_IN_MAX_3));
942	w83627hf_write_value(client, W83781D_REG_IN_MIN(4),
943	IN_TO_REG(W83781D_INIT_IN_MIN_4));
944	w83627hf_write_value(client, W83781D_REG_IN_MAX(4),
945	IN_TO_REG(W83781D_INIT_IN_MAX_4));
946	w83627hf_write_value(client, W83781D_REG_IN_MIN(5),
947	IN_TO_REG(W83782D_INIT_IN_MIN_5));
948	w83627hf_write_value(client, W83781D_REG_IN_MAX(5),
949	IN_TO_REG(W83782D_INIT_IN_MAX_5));
950	w83627hf_write_value(client, W83781D_REG_IN_MIN(6),
951	IN_TO_REG(W83782D_INIT_IN_MIN_6));
952	w83627hf_write_value(client, W83781D_REG_IN_MAX(6),
953	IN_TO_REG(W83782D_INIT_IN_MAX_6));
954	w83627hf_write_value(client, W83781D_REG_IN_MIN(7),
955	IN_TO_REG(W83781D_INIT_IN_MIN_7));
956	w83627hf_write_value(client, W83781D_REG_IN_MAX(7),
957	IN_TO_REG(W83781D_INIT_IN_MAX_7));
958	w83627hf_write_value(client, W83781D_REG_IN_MIN(8),
959	IN_TO_REG(W83781D_INIT_IN_MIN_8));
960	w83627hf_write_value(client, W83781D_REG_IN_MAX(8),
961	IN_TO_REG(W83781D_INIT_IN_MAX_8));
962	w83627hf_write_value(client, W83781D_REG_VBAT,
963	(w83627hf_read_value(client, W83781D_REG_VBAT) \| 0x01));
964	w83627hf_write_value(client, W83781D_REG_FAN_MIN(1),
965	FAN_TO_REG(W83781D_INIT_FAN_MIN_1, 2));
966	w83627hf_write_value(client, W83781D_REG_FAN_MIN(2),
967	FAN_TO_REG(W83781D_INIT_FAN_MIN_2, 2));
968	if (type != w83697hf) {
969	w83627hf_write_value(client, W83781D_REG_FAN_MIN(3),
970	FAN_TO_REG(W83781D_INIT_FAN_MIN_3, 2));
971	}
972
973	w83627hf_write_value(client, W83781D_REG_TEMP_OVER,
974	TEMP_TO_REG(W83781D_INIT_TEMP_OVER));
975	w83627hf_write_value(client, W83781D_REG_TEMP_HYST,
976	TEMP_TO_REG(W83781D_INIT_TEMP_HYST));
977
978	w83627hf_write_value(client, W83781D_REG_TEMP2_OVER,
979	TEMP_ADD_TO_REG
980	(W83781D_INIT_TEMP2_OVER));
981	w83627hf_write_value(client, W83781D_REG_TEMP2_HYST,
982	TEMP_ADD_TO_REG
983	(W83781D_INIT_TEMP2_HYST));
984	w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG, 0x00);
985
986	if (type != w83697hf) {
987	w83627hf_write_value(client, W83781D_REG_TEMP3_OVER,
988	TEMP_ADD_TO_REG
989	(W83781D_INIT_TEMP3_OVER));
990	w83627hf_write_value(client, W83781D_REG_TEMP3_HYST,
991	TEMP_ADD_TO_REG
992	(W83781D_INIT_TEMP3_HYST));
993	}
994	if (type != w83697hf) {
995	w83627hf_write_value(client, W83781D_REG_TEMP3_CONFIG,
996	0x00);
997	}
998	/* enable PWM2 control (can't hurt since PWM reg
999	should have been reset to 0xff) */
1000	w83627hf_write_value(client, W83781D_REG_PWMCLK12, 0x19);
1001	/* enable comparator mode for temp2 and temp3 so
1002	alarm indication will work correctly */
1003	w83627hf_write_value(client, W83781D_REG_IRQ, 0x41);
1004	}
1005
1006	/* Start monitoring */
1007	w83627hf_write_value(client, W83781D_REG_CONFIG,
1008	(w83627hf_read_value(client,
1009	W83781D_REG_CONFIG) & 0xf7)
1010	\| 0x01);
1011	}
1012
1013	static void w83627hf_update_client(struct i2c_client *client)
1014	{
1015	struct w83627hf_data *data = client->data;
1016	int i;
1017
1018	down(&data->update_lock);
1019
1020	if ((jiffies - data->last_updated > HZ + HZ / 2) \|\|
1021	(jiffies < data->last_updated) \|\| !data->valid) {
1022	for (i = 0; i <= 8; i++) {
1023	if ((data->type == w83697hf)
1024	&& (i == 1))
1025	continue; /* 783S has no in1 */
1026	data->in[i] =
1027	w83627hf_read_value(client, W83781D_REG_IN(i));
1028	data->in_min[i] =
1029	w83627hf_read_value(client,
1030	W83781D_REG_IN_MIN(i));
1031	data->in_max[i] =
1032	w83627hf_read_value(client,
1033	W83781D_REG_IN_MAX(i));
1034	if ((data->type != w83697hf)
1035	&& (data->type != w83627hf) && (i == 6))
1036	break;
1037	}
1038	for (i = 1; i <= 3; i++) {
1039	data->fan[i - 1] =
1040	w83627hf_read_value(client, W83781D_REG_FAN(i));
1041	data->fan_min[i - 1] =
1042	w83627hf_read_value(client,
1043	W83781D_REG_FAN_MIN(i));
1044	}
1045	for (i = 1; i <= 2; i++) {
1046	data->pwm[i - 1] =
1047	w83627hf_read_value(client,
1048	W83781D_REG_PWM(i));
1049	}
1050
1051	data->temp = w83627hf_read_value(client, W83781D_REG_TEMP);
1052	data->temp_over =
1053	w83627hf_read_value(client, W83781D_REG_TEMP_OVER);
1054	data->temp_hyst =
1055	w83627hf_read_value(client, W83781D_REG_TEMP_HYST);
1056	data->temp_add[0] =
1057	w83627hf_read_value(client, W83781D_REG_TEMP2);
1058	data->temp_add_over[0] =
1059	w83627hf_read_value(client, W83781D_REG_TEMP2_OVER);
1060	data->temp_add_hyst[0] =
1061	w83627hf_read_value(client, W83781D_REG_TEMP2_HYST);
1062	if (data->type != w83697hf) {
1063	data->temp_add[1] =
1064	w83627hf_read_value(client, W83781D_REG_TEMP3);
1065	data->temp_add_over[1] =
1066	w83627hf_read_value(client, W83781D_REG_TEMP3_OVER);
1067	data->temp_add_hyst[1] =
1068	w83627hf_read_value(client, W83781D_REG_TEMP3_HYST);
1069	}
1070	i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1071	if (data->type != w83697hf) {
1072	data->vid = i & 0x0f;
1073	data->vid \|=
1074	(w83627hf_read_value(client, W83781D_REG_CHIPID) & 0x01)
1075	<< 4;
1076	}
1077	data->fan_div[0] = (i >> 4) & 0x03;
1078	data->fan_div[1] = (i >> 6) & 0x03;
1079	if (data->type != w83697hf) {
1080	data->fan_div[2] = (w83627hf_read_value(client,
1081	W83781D_REG_PIN) >> 6) & 0x03;
1082	}
1083	i = w83627hf_read_value(client, W83781D_REG_VBAT);
1084	data->fan_div[0] \|= (i >> 3) & 0x04;
1085	data->fan_div[1] \|= (i >> 4) & 0x04;
1086	if (data->type != w83697hf)
1087	data->fan_div[2] \|= (i >> 5) & 0x04;
1088	data->alarms =
1089	w83627hf_read_value(client,
1090	W83781D_REG_ALARM1) +
1091	(w83627hf_read_value(client, W83781D_REG_ALARM2) << 8);
1092	if (data->type == w83627hf) {
1093	data->alarms \|=
1094	w83627hf_read_value(client,
1095	W83781D_REG_ALARM3) << 16;
1096	}
1097	i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1098	data->beep_enable = i >> 7;
1099	data->beeps = ((i & 0x7f) << 8) +
1100	w83627hf_read_value(client, W83781D_REG_BEEP_INTS1);
1101	data->beeps \|=
1102	w83627hf_read_value(client,
1103	W83781D_REG_BEEP_INTS3) << 16;
1104	data->last_updated = jiffies;
1105	data->valid = 1;
1106	}
1107
1108	up(&data->update_lock);
1109	}
1110
1111
1112	/* The next few functions are the call-back functions of the /proc/sys and
1113	sysctl files. Which function is used is defined in the ctl_table in
1114	the extra1 field.
1115	Each function must return the magnitude (power of 10 to divide the date
1116	with) if it is called with operation==SENSORS_PROC_REAL_INFO. It must
1117	put a maximum of *nrels elements in results reflecting the data of this
1118	file, and set *nrels to the number it actually put in it, if operation==
1119	SENSORS_PROC_REAL_READ. Finally, it must get upto *nrels elements from
1120	results and write them to the chip, if operations==SENSORS_PROC_REAL_WRITE.
1121	Note that on SENSORS_PROC_REAL_READ, I do not check whether results is
1122	large enough (by checking the incoming value of *nrels). This is not very
1123	good practice, but as long as you put less than about 5 values in results,
1124	you can assume it is large enough. */
1125	void w83627hf_in(struct i2c_client *client, int operation, int ctl_name,
1126	int nrels_mag, long results)
1127	{
1128	struct w83627hf_data *data = client->data;
1129	int nr = ctl_name - W83781D_SYSCTL_IN0;
1130
1131	if (operation == SENSORS_PROC_REAL_INFO)
1132	*nrels_mag = 2;
1133	else if (operation == SENSORS_PROC_REAL_READ) {
1134	w83627hf_update_client(client);
1135	results[0] = IN_FROM_REG(data->in_min[nr]);
1136	results[1] = IN_FROM_REG(data->in_max[nr]);
1137	results[2] = IN_FROM_REG(data->in[nr]);
1138	*nrels_mag = 3;
1139	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1140	if (*nrels_mag >= 1) {
1141	data->in_min[nr] = IN_TO_REG(results[0]);
1142	w83627hf_write_value(client, W83781D_REG_IN_MIN(nr),
1143	data->in_min[nr]);
1144	}
1145	if (*nrels_mag >= 2) {
1146	data->in_max[nr] = IN_TO_REG(results[1]);
1147	w83627hf_write_value(client, W83781D_REG_IN_MAX(nr),
1148	data->in_max[nr]);
1149	}
1150	}
1151	}
1152
1153	void w83627hf_fan(struct i2c_client *client, int operation, int ctl_name,
1154	int nrels_mag, long results)
1155	{
1156	struct w83627hf_data *data = client->data;
1157	int nr = ctl_name - W83781D_SYSCTL_FAN1 + 1;
1158
1159	if (operation == SENSORS_PROC_REAL_INFO)
1160	*nrels_mag = 0;
1161	else if (operation == SENSORS_PROC_REAL_READ) {
1162	w83627hf_update_client(client);
1163	results[0] = FAN_FROM_REG(data->fan_min[nr - 1],
1164	DIV_FROM_REG(data->fan_div[nr - 1]));
1165	results[1] = FAN_FROM_REG(data->fan[nr - 1],
1166	DIV_FROM_REG(data->fan_div[nr - 1]));
1167	*nrels_mag = 2;
1168	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1169	if (*nrels_mag >= 1) {
1170	data->fan_min[nr - 1] =
1171	FAN_TO_REG(results[0],
1172	DIV_FROM_REG(data->fan_div[nr-1]));
1173	w83627hf_write_value(client,
1174	W83781D_REG_FAN_MIN(nr),
1175	data->fan_min[nr - 1]);
1176	}
1177	}
1178	}
1179
1180	void w83627hf_temp(struct i2c_client *client, int operation, int ctl_name,
1181	int nrels_mag, long results)
1182	{
1183	struct w83627hf_data *data = client->data;
1184	if (operation == SENSORS_PROC_REAL_INFO)
1185	*nrels_mag = 1;
1186	else if (operation == SENSORS_PROC_REAL_READ) {
1187	w83627hf_update_client(client);
1188	results[0] = TEMP_FROM_REG(data->temp_over);
1189	results[1] = TEMP_FROM_REG(data->temp_hyst);
1190	results[2] = TEMP_FROM_REG(data->temp);
1191	*nrels_mag = 3;
1192	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1193	if (*nrels_mag >= 1) {
1194	data->temp_over = TEMP_TO_REG(results[0]);
1195	w83627hf_write_value(client, W83781D_REG_TEMP_OVER,
1196	data->temp_over);
1197	}
1198	if (*nrels_mag >= 2) {
1199	data->temp_hyst = TEMP_TO_REG(results[1]);
1200	w83627hf_write_value(client, W83781D_REG_TEMP_HYST,
1201	data->temp_hyst);
1202	}
1203	}
1204	}
1205
1206	void w83627hf_temp_add(struct i2c_client *client, int operation,
1207	int ctl_name, int nrels_mag, long results)
1208	{
1209	struct w83627hf_data *data = client->data;
1210	int nr = ctl_name - W83781D_SYSCTL_TEMP2;
1211
1212	if (operation == SENSORS_PROC_REAL_INFO)
1213	*nrels_mag = 1;
1214	else if (operation == SENSORS_PROC_REAL_READ) {
1215	w83627hf_update_client(client);
1216	results[0] =
1217	TEMP_ADD_FROM_REG(data->temp_add_over[nr]);
1218	results[1] =
1219	TEMP_ADD_FROM_REG(data->temp_add_hyst[nr]);
1220	results[2] = TEMP_ADD_FROM_REG(data->temp_add[nr]);
1221	*nrels_mag = 3;
1222	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1223	if (*nrels_mag >= 1) {
1224	data->temp_add_over[nr] =
1225	TEMP_ADD_TO_REG(results[0]);
1226	w83627hf_write_value(client,
1227	nr ? W83781D_REG_TEMP3_OVER :
1228	W83781D_REG_TEMP2_OVER,
1229	data->temp_add_over[nr]);
1230	}
1231	if (*nrels_mag >= 2) {
1232	data->temp_add_hyst[nr] =
1233	TEMP_ADD_TO_REG(results[1]);
1234	w83627hf_write_value(client,
1235	nr ? W83781D_REG_TEMP3_HYST :
1236	W83781D_REG_TEMP2_HYST,
1237	data->temp_add_hyst[nr]);
1238	}
1239	}
1240	}
1241
1242
1243	void w83627hf_vid(struct i2c_client *client, int operation, int ctl_name,
1244	int nrels_mag, long results)
1245	{
1246	struct w83627hf_data *data = client->data;
1247	if (operation == SENSORS_PROC_REAL_INFO)
1248	*nrels_mag = 3;
1249	else if (operation == SENSORS_PROC_REAL_READ) {
1250	w83627hf_update_client(client);
1251	results[0] = vid_from_reg(data->vid, data->vrm);
1252	*nrels_mag = 1;
1253	}
1254	}
1255
1256	void w83627hf_vrm(struct i2c_client *client, int operation, int ctl_name,
1257	int nrels_mag, long results)
1258	{
1259	struct w83627hf_data *data = client->data;
1260	if (operation == SENSORS_PROC_REAL_INFO)
1261	*nrels_mag = 1;
1262	else if (operation == SENSORS_PROC_REAL_READ) {
1263	results[0] = data->vrm;
1264	*nrels_mag = 1;
1265	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1266	if (*nrels_mag >= 1)
1267	data->vrm = results[0];
1268	}
1269	}
1270
1271	void w83627hf_alarms(struct i2c_client *client, int operation, int ctl_name,
1272	int nrels_mag, long results)
1273	{
1274	struct w83627hf_data *data = client->data;
1275	if (operation == SENSORS_PROC_REAL_INFO)
1276	*nrels_mag = 0;
1277	else if (operation == SENSORS_PROC_REAL_READ) {
1278	w83627hf_update_client(client);
1279	results[0] = data->alarms;
1280	*nrels_mag = 1;
1281	}
1282	}
1283
1284	void w83627hf_beep(struct i2c_client *client, int operation, int ctl_name,
1285	int nrels_mag, long results)
1286	{
1287	struct w83627hf_data *data = client->data;
1288	int val;
1289
1290	if (operation == SENSORS_PROC_REAL_INFO)
1291	*nrels_mag = 0;
1292	else if (operation == SENSORS_PROC_REAL_READ) {
1293	w83627hf_update_client(client);
1294	results[0] = BEEP_ENABLE_FROM_REG(data->beep_enable);
1295	results[1] = data->beeps;
1296	*nrels_mag = 2;
1297	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1298	if (*nrels_mag >= 2) {
1299	data->beeps = BEEPS_TO_REG(results[1]);
1300	w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
1301	data->beeps & 0xff);
1302	w83627hf_write_value(client,
1303	W83781D_REG_BEEP_INTS3,
1304	((data-> beeps) >> 16) &
1305	0xff);
1306	val = (data->beeps >> 8) & 0x7f;
1307	} else if (*nrels_mag >= 1)
1308	val =
1309	w83627hf_read_value(client,
1310	W83781D_REG_BEEP_INTS2) &
1311	0x7f;
1312	if (*nrels_mag >= 1) {
1313	data->beep_enable = BEEP_ENABLE_TO_REG(results[0]);
1314	w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
1315	val \| data->beep_enable << 7);
1316	}
1317	}
1318	}
1319
1320	/* w83697hf only has two fans */
1321	void w83627hf_fan_div(struct i2c_client *client, int operation,
1322	int ctl_name, int nrels_mag, long results)
1323	{
1324	struct w83627hf_data *data = client->data;
1325	int old, old2, old3 = 0;
1326
1327	if (operation == SENSORS_PROC_REAL_INFO)
1328	*nrels_mag = 0;
1329	else if (operation == SENSORS_PROC_REAL_READ) {
1330	w83627hf_update_client(client);
1331	results[0] = DIV_FROM_REG(data->fan_div[0]);
1332	results[1] = DIV_FROM_REG(data->fan_div[1]);
1333	if (data->type == w83697hf) {
1334	*nrels_mag = 2;
1335	} else {
1336	results[2] = DIV_FROM_REG(data->fan_div[2]);
1337	*nrels_mag = 3;
1338	}
1339	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1340	old = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1341	/* w83627hf and as99127f don't have extended divisor bits */
1342	old3 =
1343	w83627hf_read_value(client, W83781D_REG_VBAT);
1344	if (*nrels_mag >= 3 && data->type != w83697hf) {
1345	data->fan_div[2] =
1346	DIV_TO_REG(results[2]);
1347	old2 = w83627hf_read_value(client, W83781D_REG_PIN);
1348	old2 =
1349	(old2 & 0x3f) \| ((data->fan_div[2] & 0x03) << 6);
1350	w83627hf_write_value(client, W83781D_REG_PIN, old2);
1351	old3 =
1352	(old3 & 0x7f) \|
1353	((data->fan_div[2] & 0x04) << 5);
1354	}
1355	if (*nrels_mag >= 2) {
1356	data->fan_div[1] =
1357	DIV_TO_REG(results[1]);
1358	old =
1359	(old & 0x3f) \| ((data->fan_div[1] & 0x03) << 6);
1360	old3 =
1361	(old3 & 0xbf) \|
1362	((data->fan_div[1] & 0x04) << 4);
1363	}
1364	if (*nrels_mag >= 1) {
1365	data->fan_div[0] =
1366	DIV_TO_REG(results[0]);
1367	old =
1368	(old & 0xcf) \| ((data->fan_div[0] & 0x03) << 4);
1369	w83627hf_write_value(client, W83781D_REG_VID_FANDIV,
1370	old);
1371	old3 =
1372	(old3 & 0xdf) \|
1373	((data->fan_div[0] & 0x04) << 3);
1374	w83627hf_write_value(client,
1375	W83781D_REG_VBAT,
1376	old3);
1377	}
1378	}
1379	}
1380
1381	void w83627hf_pwm(struct i2c_client *client, int operation, int ctl_name,
1382	int nrels_mag, long results)
1383	{
1384	struct w83627hf_data *data = client->data;
1385	int nr = 1 + ctl_name - W83781D_SYSCTL_PWM1;
1386
1387	if (operation == SENSORS_PROC_REAL_INFO)
1388	*nrels_mag = 0;
1389	else if (operation == SENSORS_PROC_REAL_READ) {
1390	w83627hf_update_client(client);
1391	results[0] = data->pwm[nr - 1];
1392	results[1] = data->pwmenable[nr - 1];
1393	*nrels_mag = 2;
1394	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1395	if (*nrels_mag >= 1) {
1396	data->pwm[nr - 1] = PWM_TO_REG(results[0]);
1397	w83627hf_write_value(client, W83781D_REG_PWM(nr),
1398	data->pwm[nr - 1]);
1399	}
1400	}
1401	}
1402
1403	void w83627hf_sens(struct i2c_client *client, int operation, int ctl_name,
1404	int nrels_mag, long results)
1405	{
1406	struct w83627hf_data *data = client->data;
1407	int nr = 1 + ctl_name - W83781D_SYSCTL_SENS1;
1408	u8 tmp;
1409
1410	if (operation == SENSORS_PROC_REAL_INFO)
1411	*nrels_mag = 0;
1412	else if (operation == SENSORS_PROC_REAL_READ) {
1413	results[0] = data->sens[nr - 1];
1414	*nrels_mag = 1;
1415	} else if (operation == SENSORS_PROC_REAL_WRITE) {
1416	if (*nrels_mag >= 1) {
1417	switch (results[0]) {
1418	case 1: /* PII/Celeron diode */
1419	tmp = w83627hf_read_value(client,
1420	W83781D_REG_SCFG1);
1421	w83627hf_write_value(client,
1422	W83781D_REG_SCFG1,
1423	tmp \| BIT_SCFG1[nr -
1424	1]);
1425	tmp = w83627hf_read_value(client,
1426	W83781D_REG_SCFG2);
1427	w83627hf_write_value(client,
1428	W83781D_REG_SCFG2,
1429	tmp \| BIT_SCFG2[nr -
1430	1]);
1431	data->sens[nr - 1] = results[0];
1432	break;
1433	case 2: /* 3904 */
1434	tmp = w83627hf_read_value(client,
1435	W83781D_REG_SCFG1);
1436	w83627hf_write_value(client,
1437	W83781D_REG_SCFG1,
1438	tmp \| BIT_SCFG1[nr -
1439	1]);
1440	tmp = w83627hf_read_value(client,
1441	W83781D_REG_SCFG2);
1442	w83627hf_write_value(client,
1443	W83781D_REG_SCFG2,
1444	tmp & ~BIT_SCFG2[nr -
1445	1]);
1446	data->sens[nr - 1] = results[0];
1447	break;
1448	case W83781D_DEFAULT_BETA: /* thermistor */
1449	tmp = w83627hf_read_value(client,
1450	W83781D_REG_SCFG1);
1451	w83627hf_write_value(client,
1452	W83781D_REG_SCFG1,
1453	tmp & ~BIT_SCFG1[nr -
1454	1]);
1455	data->sens[nr - 1] = results[0];
1456	break;
1457	default:
1458	printk
1459	(KERN_ERR "w83627hf.o: Invalid sensor type %ld; must be 1, 2, or %d\n",
1460	results[0], W83781D_DEFAULT_BETA);
1461	break;
1462	}
1463	}
1464	}
1465	}
1466
1467	static int __init sm_w83627hf_init(void)
1468	{
1469	int res, addr;
1470
1471	printk(KERN_INFO "w83627hf.o version %s (%s)\n", LM_VERSION, LM_DATE);
1472	if (w83627hf_find(&addr)) {
1473	printk("w83627hf.o: W83627/697 not detected, module not inserted.\n");
1474	return -ENODEV;
1475	}
1476	normal_isa[0] = addr;
1477
1478	return i2c_add_driver(&w83627hf_driver);
1479	}
1480
1481	static void __exit sm_w83627hf_exit(void)
1482	{
1483	i2c_del_driver(&w83627hf_driver);
1484	}
1485
1486
1487
1488	MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1489	"Philip Edelbrock <phil@netroedge.com>, "
1490	"and Mark Studebaker <mdsxyz123@yahoo.com>");
1491	MODULE_DESCRIPTION("W83627HF driver");
1492	MODULE_LICENSE("GPL");
1493
1494	module_init(sm_w83627hf_init);
1495	module_exit(sm_w83627hf_exit);

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