| 1 | /* |
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| 2 | piix4.c - Part of lm_sensors, Linux kernel modules for hardware |
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| 3 | monitoring |
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| 4 | Copyright (c) 1998 Frodo Looijaard <frodol@dds.nl> and |
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| 5 | Philip Edelbrock <phil@netroedge.com> |
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| 6 | |
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| 7 | This program is free software; you can redistribute it and/or modify |
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| 8 | it under the terms of the GNU General Public License as published by |
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| 9 | the Free Software Foundation; either version 2 of the License, or |
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| 10 | (at your option) any later version. |
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| 11 | |
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| 12 | This program is distributed in the hope that it will be useful, |
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| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 15 | GNU General Public License for more details. |
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| 16 | |
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| 17 | You should have received a copy of the GNU General Public License |
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| 18 | along with this program; if not, write to the Free Software |
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| 19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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| 20 | */ |
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| 21 | |
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| 22 | /* Note: we assume there can only be one PIIX4, with one SMBus interface */ |
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| 23 | |
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| 24 | #include <linux/module.h> |
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| 25 | #include <linux/pci.h> |
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| 26 | #include <asm/io.h> |
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| 27 | #include <linux/kernel.h> |
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| 28 | #include <linux/stddef.h> |
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| 29 | #include <linux/sched.h> |
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| 30 | #include <linux/ioport.h> |
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| 31 | #include "smbus.h" |
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| 32 | #include "version.h" |
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| 33 | #include "compat.h" |
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| 34 | |
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| 35 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,1,54)) |
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| 36 | #include <linux/bios32.h> |
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| 37 | #endif |
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| 38 | |
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| 39 | |
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| 40 | /* PIIX4 SMBus address offsets */ |
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| 41 | #define SMBHSTSTS (0 + piix4_smba) |
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| 42 | #define SMBHSLVSTS (1 + piix4_smba) |
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| 43 | #define SMBHSTCNT (2 + piix4_smba) |
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| 44 | #define SMBHSTCMD (3 + piix4_smba) |
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| 45 | #define SMBHSTADD (4 + piix4_smba) |
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| 46 | #define SMBHSTDAT0 (5 + piix4_smba) |
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| 47 | #define SMBHSTDAT1 (6 + piix4_smba) |
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| 48 | #define SMBBLKDAT (7 + piix4_smba) |
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| 49 | #define SMBSLVCNT (8 + piix4_smba) |
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| 50 | #define SMBSHDWCMD (9 + piix4_smba) |
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| 51 | #define SMBSLVEVT (0xA + piix4_smba) |
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| 52 | #define SMBSLVDAT (0xC + piix4_smba) |
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| 53 | |
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| 54 | /* PCI Address Constants */ |
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| 55 | #define SMBBA 0x090 |
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| 56 | #define SMBHSTCFG 0x0D2 |
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| 57 | #define SMBSLVC 0x0D3 |
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| 58 | #define SMBSHDW1 0x0D4 |
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| 59 | #define SMBSHDW2 0x0D5 |
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| 60 | #define SMBREV 0x0D6 |
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| 61 | |
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| 62 | /* Other settings */ |
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| 63 | #define MAX_TIMEOUT 500 |
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| 64 | #define ENABLE_INT9 0 |
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| 65 | |
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| 66 | /* PIIX4 constants */ |
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| 67 | #define PIIX4_QUICK 0x00 |
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| 68 | #define PIIX4_BYTE 0x04 |
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| 69 | #define PIIX4_BYTE_DATA 0x08 |
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| 70 | #define PIIX4_WORD_DATA 0x0C |
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| 71 | #define PIIX4_BLOCK_DATA 0x14 |
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| 72 | |
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| 73 | |
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| 74 | static int piix4_init(void); |
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| 75 | static int piix4_cleanup(void); |
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| 76 | static int piix4_setup(void); |
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| 77 | static s32 piix4_access(u8 addr, char read_write, |
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| 78 | u8 command, int size, union smbus_data * data); |
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| 79 | static void piix4_do_pause( unsigned int amount ); |
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| 80 | static int piix4_transaction(void); |
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| 81 | |
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| 82 | #ifdef MODULE |
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| 83 | extern int init_module(void); |
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| 84 | extern int cleanup_module(void); |
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| 85 | #endif /* MODULE */ |
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| 86 | |
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| 87 | static struct smbus_adapter piix4_adapter; |
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| 88 | static int piix4_initialized; |
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| 89 | static unsigned short piix4_smba = 0; |
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| 90 | |
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| 91 | |
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| 92 | /* Detect whether a PIIX4 can be found, and initialize it, where necessary. |
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| 93 | Note the differences between kernels with the old PCI BIOS interface and |
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| 94 | newer kernels with the real PCI interface. In compat.h some things are |
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| 95 | defined to make the transition easier. */ |
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| 96 | int piix4_setup(void) |
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| 97 | { |
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| 98 | int error_return=0; |
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| 99 | unsigned char temp; |
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| 100 | |
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| 101 | #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,54)) |
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| 102 | struct pci_dev *PIIX4_dev; |
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| 103 | #else |
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| 104 | unsigned char PIIX4_bus, PIIX4_devfn; |
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| 105 | int i,res; |
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| 106 | #endif |
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| 107 | |
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| 108 | /* First check whether we can access PCI at all */ |
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| 109 | if (pci_present() == 0) { |
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| 110 | printk("piix4.o: Error: No PCI-bus found!\n"); |
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| 111 | error_return=-ENODEV; |
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| 112 | goto END; |
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| 113 | } |
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| 114 | |
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| 115 | /* Look for the PIIX4, function 3 */ |
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| 116 | #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,54)) |
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| 117 | /* Note: we keep on searching until we have found 'function 3' */ |
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| 118 | PIIX4_dev = NULL; |
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| 119 | do |
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| 120 | PIIX4_dev = pci_find_device(PCI_VENDOR_ID_INTEL, |
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| 121 | PCI_DEVICE_ID_INTEL_82371AB_3, PIIX4_dev); |
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| 122 | while(PIIX4_dev && (PCI_FUNC(PIIX4_dev->devfn) != 3)); |
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| 123 | if(PIIX4_dev == NULL) { |
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| 124 | #else /* LINUX_VERSION_CODE < KERNEL_VERSION(2,1,54) */ |
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| 125 | for (i = 0; |
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| 126 | ! (res = pcibios_find_device(PCI_VENDOR_ID_INTEL, |
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| 127 | PCI_DEVICE_ID_INTEL_82371AB_3, |
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| 128 | i,&PIIX4_bus, &PIIX4_devfn)) && |
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| 129 | PCI_FUNC(PIIX4_devfn) != 3; |
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| 130 | i++); |
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| 131 | |
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| 132 | if (res) { |
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| 133 | #endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,54) */ |
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| 134 | printk("piix4.o: Error: Can't detect PIIX4, function 3!\n"); |
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| 135 | error_return=-ENODEV; |
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| 136 | goto END; |
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| 137 | } |
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| 138 | |
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| 139 | /* Determine the address of the SMBus areas */ |
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| 140 | pci_read_config_word_united(PIIX4_dev, PIIX4_bus ,PIIX4_devfn, |
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| 141 | SMBBA,&piix4_smba); |
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| 142 | piix4_smba &= 0xfff0; |
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| 143 | |
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| 144 | if (check_region(piix4_smba, 8)) { |
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| 145 | printk("piix4.o: PIIX4_smb region 0x%x already in use!\n", piix4_smba); |
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| 146 | error_return=-ENODEV; |
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| 147 | goto END; |
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| 148 | } |
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| 149 | |
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| 150 | pci_read_config_byte_united(PIIX4_dev, PIIX4_bus, PIIX4_devfn, |
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| 151 | SMBHSTCFG, &temp); |
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| 152 | |
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| 153 | |
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| 154 | #ifdef FORCE_PIIX4_ENABLE |
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| 155 | /* This should never need to be done, but has been noted that |
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| 156 | many Dell machines have the SMBus interface on the PIIX4 |
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| 157 | disabled!? NOTE: This assumes I/O space and other allocations WERE |
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| 158 | done by the Bios! Don't complain if your hardware does weird |
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| 159 | things after enabling this. :') Check for Bios updates before |
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| 160 | resorting to this. */ |
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| 161 | if ((temp & 1) == 0) { |
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| 162 | pci_write_config_byte_united(PIIX4_dev, PIIX4_bus, PIIX4_devfn, |
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| 163 | SMBHSTCFG, temp | 1); |
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| 164 | printk("piix4.0: WARNING: PIIX4 SMBus interface has been FORCEFULLY " |
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| 165 | "ENABLED!!\n"); |
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| 166 | /* Update configuration value */ |
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| 167 | pci_read_config_byte_united(PIIX4_dev, PIIX4_bus, PIIX4_devfn, |
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| 168 | SMBHSTCFG, &temp); |
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| 169 | /* Note: We test the bit again in the next 'if' just to be sure... */ |
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| 170 | } |
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| 171 | #endif /* FORCE_PIIX4_ENABLE */ |
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| 172 | |
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| 173 | if ((temp & 1) == 0) { |
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| 174 | printk("SMBUS: Error: Host SMBus controller not enabled!\n"); |
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| 175 | error_return=-ENODEV; |
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| 176 | goto END; |
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| 177 | } |
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| 178 | |
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| 179 | /* Everything is happy, let's grab the memory and set things up. */ |
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| 180 | request_region(piix4_smba, 8, "piix4"); |
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| 181 | |
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| 182 | #ifdef DEBUG |
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| 183 | if ((temp & 0x0E) == 8) |
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| 184 | printk("piix4.o: PIIX4 using Interrupt 9 for SMBus.\n"); |
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| 185 | else if ((temp & 0x0E) == 0) |
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| 186 | printk("piix4.o: PIIX4 using Interrupt SMI# for SMBus.\n"); |
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| 187 | else |
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| 188 | printk("piix4.o: PIIX4: Illegal Interrupt configuration (or code out " |
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| 189 | "of date)!\n"); |
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| 190 | |
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| 191 | pci_read_config_byte_united(PIIX4_dev, PIIX4_bus, PIIX4_devfn, SMBREV, |
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| 192 | &temp); |
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| 193 | printk("piix4.o: SMBREV = 0x%X\n",temp); |
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| 194 | printk("piix4.o: PIIX4_smba = 0x%X\n",piix4_smba); |
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| 195 | #endif /* DEBUG */ |
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| 196 | |
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| 197 | END: |
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| 198 | return error_return; |
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| 199 | } |
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| 200 | |
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| 201 | |
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| 202 | /* Internally used pause function */ |
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| 203 | void piix4_do_pause( unsigned int amount ) |
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| 204 | { |
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| 205 | current->state = TASK_INTERRUPTIBLE; |
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| 206 | schedule_timeout(amount); |
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| 207 | } |
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| 208 | |
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| 209 | /* Another internally used function */ |
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| 210 | int piix4_transaction(void) |
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| 211 | { |
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| 212 | int temp; |
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| 213 | int result=0; |
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| 214 | int timeout=0; |
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| 215 | |
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| 216 | #ifdef DEBUG |
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| 217 | printk("piix4.o: Transaction: CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, " |
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| 218 | "DAT1=%02x\n", |
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| 219 | inb_p(SMBHSTCNT),inb_p(SMBHSTCMD),inb_p(SMBHSTADD),inb_p(SMBHSTDAT0), |
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| 220 | inb_p(SMBHSTDAT1)); |
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| 221 | #endif |
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| 222 | |
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| 223 | /* Make sure the SMBus host is ready to start transmitting */ |
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| 224 | if ((temp = inb_p(SMBHSTSTS)) != 0x00) { |
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| 225 | #ifdef DEBUG |
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| 226 | printk("piix4.o: SMBus busy (%02x). Resetting... \n",temp); |
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| 227 | #endif |
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| 228 | outb_p(temp, SMBHSTSTS); |
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| 229 | if ((temp = inb_p(SMBHSTSTS)) != 0x00) { |
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| 230 | #ifdef DEBUG |
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| 231 | printk("piix4.o: Failed! (%02x)\n",temp); |
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| 232 | #endif |
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| 233 | return -1; |
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| 234 | } else { |
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| 235 | #ifdef DEBUG |
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| 236 | printk("piix4.o: Successfull!\n"); |
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| 237 | #endif |
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| 238 | } |
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| 239 | } |
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| 240 | |
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| 241 | /* start the transaction by setting bit 6 */ |
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| 242 | outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT); |
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| 243 | |
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| 244 | /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */ |
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| 245 | do { |
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| 246 | piix4_do_pause(1); |
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| 247 | temp=inb_p(SMBHSTSTS); |
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| 248 | } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT)); |
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| 249 | |
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| 250 | /* If the SMBus is still busy, we give up */ |
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| 251 | if (timeout >= MAX_TIMEOUT) { |
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| 252 | #ifdef DEBUG |
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| 253 | printk("piix4.o: SMBus Timeout!\n"); |
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| 254 | result = -1; |
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| 255 | #endif |
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| 256 | } |
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| 257 | |
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| 258 | if (temp & 0x10) { |
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| 259 | result = -1; |
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| 260 | #ifdef DEBUG |
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| 261 | printk("piix4.o: Error: Failed bus transaction\n"); |
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| 262 | #endif |
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| 263 | } |
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| 264 | |
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| 265 | if (temp & 0x08) { |
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| 266 | result = -1; |
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| 267 | printk("piix4.o: Bus collision! SMBus may be locked until next hard |
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| 268 | reset. (sorry!)\n"); |
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| 269 | /* Clock stops and slave is stuck in mid-transmission */ |
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| 270 | } |
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| 271 | |
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| 272 | if (temp & 0x04) { |
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| 273 | result = -1; |
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| 274 | #ifdef DEBUG |
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| 275 | printk("piix4.o: Error: no response!\n"); |
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| 276 | #endif |
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| 277 | } |
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| 278 | |
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| 279 | if (inb_p(SMBHSTSTS) != 0x00) |
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| 280 | outb_p( inb(SMBHSTSTS), SMBHSTSTS); |
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| 281 | |
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| 282 | if ((temp = inb_p(SMBHSTSTS)) != 0x00) { |
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| 283 | #ifdef DEBUG |
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| 284 | printk("piix4.o: Failed reset at end of transaction (%02x)\n",temp); |
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| 285 | #endif |
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| 286 | } |
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| 287 | return result; |
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| 288 | } |
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| 289 | |
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| 290 | /* Return -1 on error. See smbus.h for more information */ |
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| 291 | s32 piix4_access(u8 addr, char read_write, |
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| 292 | u8 command, int size, union smbus_data * data) |
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| 293 | { |
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| 294 | int i,len; |
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| 295 | |
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| 296 | switch(size) { |
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| 297 | case SMBUS_PROC_CALL: |
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| 298 | printk("piix4.o: SMBUS_PROC_CALL not supported!\n"); |
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| 299 | return -1; |
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| 300 | case SMBUS_QUICK: |
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| 301 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD); |
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| 302 | size = PIIX4_QUICK; |
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| 303 | break; |
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| 304 | case SMBUS_BYTE: |
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| 305 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD); |
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| 306 | if (read_write == SMBUS_WRITE) |
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| 307 | outb_p(command, SMBHSTCMD); |
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| 308 | size = PIIX4_BYTE; |
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| 309 | break; |
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| 310 | case SMBUS_BYTE_DATA: |
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| 311 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD); |
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| 312 | outb_p(command, SMBHSTCMD); |
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| 313 | if (read_write == SMBUS_WRITE) |
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| 314 | outb_p(data->byte,SMBHSTDAT0); |
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| 315 | size = PIIX4_BYTE_DATA; |
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| 316 | break; |
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| 317 | case SMBUS_WORD_DATA: |
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| 318 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD); |
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| 319 | outb_p(command, SMBHSTCMD); |
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| 320 | if (read_write == SMBUS_WRITE) { |
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| 321 | outb_p(data->word & 0xff,SMBHSTDAT0); |
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| 322 | outb_p((data->word & 0xff00) >> 8,SMBHSTDAT1); |
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| 323 | } |
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| 324 | size = PIIX4_WORD_DATA; |
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| 325 | break; |
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| 326 | case SMBUS_BLOCK_DATA: |
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| 327 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD); |
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| 328 | outb_p(command, SMBHSTCMD); |
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| 329 | if (read_write == SMBUS_WRITE) { |
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| 330 | len = data->block[0]; |
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| 331 | if (len < 0) |
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| 332 | len = 0; |
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| 333 | if (len > 32) |
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| 334 | len = 32; |
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| 335 | outb_p(len,SMBHSTDAT0); |
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| 336 | i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ |
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| 337 | for (i = 1; i <= len; i ++) |
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| 338 | outb_p(data->block[i],SMBBLKDAT); |
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| 339 | } |
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| 340 | size = PIIX4_BLOCK_DATA; |
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| 341 | break; |
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| 342 | } |
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| 343 | |
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| 344 | outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT); |
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| 345 | |
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| 346 | if (piix4_transaction()) /* Error in transaction */ |
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| 347 | return -1; |
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| 348 | |
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| 349 | if ((read_write == SMBUS_WRITE) || (size == PIIX4_QUICK)) |
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| 350 | return 0; |
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| 351 | |
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| 352 | |
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| 353 | switch(size) { |
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| 354 | case PIIX4_BYTE: /* Where is the result put? I assume here it is in |
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| 355 | SMBHSTDAT0 but it might just as well be in the |
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| 356 | SMBHSTCMD. No clue in the docs */ |
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| 357 | |
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| 358 | data->byte = inb_p(SMBHSTDAT0); |
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| 359 | break; |
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| 360 | case PIIX4_BYTE_DATA: |
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| 361 | data->byte = inb_p(SMBHSTDAT0); |
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| 362 | break; |
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| 363 | case PIIX4_WORD_DATA: |
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| 364 | data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); |
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| 365 | break; |
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| 366 | case PIIX4_BLOCK_DATA: |
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| 367 | data->block[0] = inb_p(SMBHSTDAT0); |
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| 368 | i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ |
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| 369 | for (i = 1; i <= data->block[0]; i++) |
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| 370 | data->block[i] = inb_p(SMBBLKDAT); |
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| 371 | break; |
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| 372 | } |
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| 373 | return 0; |
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| 374 | } |
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| 375 | |
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| 376 | |
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| 377 | int piix4_init(void) |
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| 378 | { |
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| 379 | int res; |
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| 380 | printk("piix4.o version %s (%s)\n",LM_VERSION,LM_DATE); |
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| 381 | #ifdef DEBUG |
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| 382 | /* PE- It might be good to make this a permanent part of the code! */ |
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| 383 | if (piix4_initialized) { |
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| 384 | printk("piix4.o: Oops, piix4_init called a second time!\n"); |
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| 385 | return -EBUSY; |
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| 386 | } |
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| 387 | #endif |
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| 388 | piix4_initialized = 0; |
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| 389 | if ((res = piix4_setup())) { |
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| 390 | printk("piix4.o: PIIX4 not detected, module not inserted.\n"); |
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| 391 | piix4_cleanup(); |
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| 392 | return res; |
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| 393 | } |
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| 394 | piix4_initialized ++; |
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| 395 | sprintf(piix4_adapter.name,"SMBus PIIX4 adapter at %04x",piix4_smba); |
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| 396 | piix4_adapter.id = ALGO_SMBUS | SMBUS_PIIX4; |
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| 397 | piix4_adapter.algo = &smbus_algorithm; |
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| 398 | piix4_adapter.smbus_access = &piix4_access; |
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| 399 | if ((res = smbus_add_adapter(&piix4_adapter))) { |
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| 400 | printk("piix4.o: Adapter registration failed, module not inserted.\n"); |
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| 401 | piix4_cleanup(); |
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| 402 | return res; |
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| 403 | } |
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| 404 | piix4_initialized++; |
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| 405 | printk("piix4.o: PIIX4 bus detected and initialized\n"); |
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| 406 | return 0; |
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| 407 | } |
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| 408 | |
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| 409 | int piix4_cleanup(void) |
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| 410 | { |
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| 411 | int res; |
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| 412 | if (piix4_initialized >= 2) |
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| 413 | { |
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| 414 | if ((res = smbus_del_adapter(&piix4_adapter))) { |
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| 415 | printk("piix4.o: smbus_del_adapter failed, module not removed\n"); |
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| 416 | return res; |
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| 417 | } else |
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| 418 | piix4_initialized--; |
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| 419 | } |
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| 420 | if (piix4_initialized >= 1) { |
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| 421 | release_region(piix4_smba, 8); |
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| 422 | piix4_initialized--; |
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| 423 | } |
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| 424 | return 0; |
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| 425 | } |
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| 426 | |
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| 427 | #ifdef MODULE |
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| 428 | |
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| 429 | MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and Philip Edelbrock <phil@netroedge.com>"); |
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| 430 | MODULE_DESCRIPTION("PIIX4 SMBus driver"); |
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| 431 | |
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| 432 | int init_module(void) |
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| 433 | { |
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| 434 | return piix4_init(); |
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| 435 | } |
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| 436 | |
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| 437 | int cleanup_module(void) |
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| 438 | { |
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| 439 | return piix4_cleanup(); |
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| 440 | } |
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| 441 | |
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| 442 | #endif /* MODULE */ |
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| 443 | |
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