| 1 | Kernel driver `ddcmon.o' |
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| 2 | ======================== |
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| 3 | |
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| 4 | Status: As complete as we want it to be, lightly tested |
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| 5 | |
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| 6 | Supported chips: |
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| 7 | * Any DDC Monitor EDID EEPROM chip at 0x50 |
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| 8 | Prefix `ddcmon' |
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| 9 | Addresses scanned: I2C 0x50 |
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| 10 | Standards: available for purchase from VESA http://www.vesa.org |
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| 11 | Datasheets: Publicly available from Atmel (www.atmel.com), |
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| 12 | Fairchild (www.fairchildsemi.com), and |
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| 13 | Microchip (www.microchip.com) |
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| 14 | |
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| 15 | Chip Size (bits) Address |
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| 16 | 24C01 1K 0x50 (shadows at 0x51 - 0x57) |
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| 17 | (Typical device in monitors) |
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| 18 | 24C01A 1K 0x50 - 0x57 (Typical device in monitors) |
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| 19 | 24C02 2K 0x50 - 0x57 |
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| 20 | 24C04 4K 0x50, 0x52, 0x54, 0x56 |
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| 21 | (additional data at 0x51, 0x53, 0x55, 0x57) |
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| 22 | 24C08 8K 0x50, 0x54 (additional data at 0x51, 0x52, |
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| 23 | 0x53, 0x55, 0x56, 0x57) |
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| 24 | 24C16 16K 0x50 (additional data at 0x51 - 0x57) |
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| 25 | |
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| 26 | |
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| 27 | Author: Frodo Looijaard <frodol@dds.nl>, Philip Edelbrock |
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| 28 | <phil@netroedge.com>, Mark Studebaker <mdsxyz123@yahoo.com> and |
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| 29 | Jean Delvare <khali@linux-fr.org> |
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| 30 | |
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| 31 | Special assistance on DDC provided by Petr Vandrovec <vandrove@vc.cvut.cz> |
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| 32 | |
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| 33 | License: GPL |
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| 34 | |
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| 35 | |
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| 36 | Module Parameters |
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| 37 | ----------------- |
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| 38 | |
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| 39 | * force: short array (min = 1, max = 48) |
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| 40 | List of adapter,address pairs to boldly assume to be present |
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| 41 | * force_ddcmon: short array (min = 1, max = 48) |
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| 42 | Same as 'force' |
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| 43 | * ignore: short array (min = 1, max = 48) |
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| 44 | List of adapter,address pairs not to scan |
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| 45 | * ignore_range: short array (min = 1, max = 48) |
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| 46 | List of adapter,start-addr,end-addr triples not to scan |
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| 47 | * probe: short array (min = 1, max = 48) |
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| 48 | List of adapter,address pairs to scan additionally |
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| 49 | * probe_range: short array (min = 1, max = 48) |
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| 50 | List of adapter,start-addr,end-addr triples to scan additionally |
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| 51 | * checksum: int |
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| 52 | Only accept eeproms whose checksum is correct |
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| 53 | |
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| 54 | |
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| 55 | Description |
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| 56 | ----------- |
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| 57 | |
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| 58 | This is a simple module for reading the EEPROM on a DDC-compliant monitor. |
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| 59 | DDC (Display Data Channel) is the I2C-based communication channel |
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| 60 | to the monitor. The EEPROM contains a 128-byte data structure defined |
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| 61 | by the EDID (Extended Display Identification Data) standard. |
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| 62 | |
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| 63 | Use: |
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| 64 | |
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| 65 | After inserting the module (and any other required smbus/i2c modules), you |
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| 66 | should have a directory in /proc/sys/dev/sensors/ with a name such |
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| 67 | as "ddcmon-i2c-3-50". Inside each of these is a series of files which |
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| 68 | represent interesting data from the DDC monitor. |
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| 69 | |
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| 70 | /proc entries: |
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| 71 | |
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| 72 | dpms: bitmask |
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| 73 | DPMS support flags |
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| 74 | 0x20 Active Off |
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| 75 | 0x40 Suspend |
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| 76 | 0x80 Standby |
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| 77 | |
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| 78 | edid: 2 integers |
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| 79 | EDID version and revision |
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| 80 | |
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| 81 | gamma: 1 float |
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| 82 | gamma factor |
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| 83 | |
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| 84 | id: 2 integers |
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| 85 | manufacturer ID and product ID |
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| 86 | Manufacturer ID is encoded, see 'sensors' |
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| 87 | source ../../prog/sensors/chips.c. |
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| 88 | |
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| 89 | maxclock: 1 integer |
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| 90 | max pixel clock (also known as video bandwidth) (MHz) |
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| 91 | 0 if not available. |
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| 92 | |
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| 93 | serial: 1 integer |
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| 94 | serial number |
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| 95 | Encoding depends on the manufacturer, don't expect the |
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| 96 | real serial number here. 0 probably means "not available". |
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| 97 | |
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| 98 | size: 2 integers |
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| 99 | vertical monitor size (cm) |
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| 100 | horizontal monitor size (cm) |
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| 101 | |
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| 102 | sync: 4 integers |
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| 103 | minimum vertical sync frequency (Hz) |
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| 104 | maximum vertical sync frequency (Hz) |
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| 105 | minimum horizontal sync frequency (KHz) |
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| 106 | maximum horizontal sync frequency (KHz) |
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| 107 | 0 0 0 0 if not available. |
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| 108 | |
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| 109 | time: 2 integers |
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| 110 | Manufacture year and week |
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| 111 | |
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| 112 | timing[1-8]: 3 integers |
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| 113 | supported standard timing |
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| 114 | horizontal resolution |
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| 115 | vertical resolution |
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| 116 | (vertical) refresh rate |
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| 117 | 0 0 0 if not used. |
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| 118 | |
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| 119 | timings: bitmask |
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| 120 | supported established timings |
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| 121 | 0x000001 720x400@70Hz (VGA 640x400, IBM) |
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| 122 | 0x000002 720x400@88Hz (XGA2) |
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| 123 | 0x000004 640x480@60Hz (VGA) |
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| 124 | 0x000008 640x480@67Hz (Mac II, Apple) |
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| 125 | 0x000010 640x480@72Hz (VESA) |
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| 126 | 0x000020 640x480@75Hz (VESA) |
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| 127 | 0x000040 800x600@56Hz (VESA) |
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| 128 | 0x000080 800x600@60Hz (VESA) |
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| 129 | 0x000100 800x600@72Hz (VESA) |
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| 130 | 0x000200 800x600@75Hz (VESA) |
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| 131 | 0x000400 832x624@75Hz (Mac II) |
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| 132 | 0x000800 1024x768@87Hz interlaced (8514A) |
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| 133 | 0x001000 1024x768@60Hz (VESA) |
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| 134 | 0x002000 1024x768@70Hz (VESA) |
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| 135 | 0x004000 1024x768@75Hz (VESA) |
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| 136 | 0x008000 1280x1024@75Hz (VESA) |
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| 137 | 0x010000 - 0x800000 Manufacturer reserved |
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| 138 | 0x800000 1152x870 @ 75 Hz (Mac II, Apple)? |
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| 139 | |
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| 140 | |
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| 141 | Chip Features |
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| 142 | ------------- |
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| 143 | |
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| 144 | Chip 'ddcmon' |
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| 145 | |
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| 146 | LABEL LABEL CLASS COMPUTE CLASS MODE MAGN |
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| 147 | Manufacturer ID - - R- 0 |
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| 148 | Model Number - - R- 0 |
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| 149 | Monitor Size (cm) - - R- 0 |
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| 150 | hsize Monitor Size (cm) - R- 0 |
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| 151 | Vertical Sync (Hz) - - R- 0 |
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| 152 | v_sync_max Vertical Sync (Hz) - R- 0 |
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| 153 | Horizontal Sync (KHz) - - R- 0 |
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| 154 | h_sync_max Horizontal Sync (KHz) - R- 0 |
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| 155 | Established Timings - - R- 0 |
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| 156 | Serial Number - - R- 0 |
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| 157 | Manufacture Time - - R- 0 |
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| 158 | week Manufacture Time - R- 0 |
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| 159 | EDID Version - - R- 0 |
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| 160 | revision EDID Version - R- 0 |
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| 161 | Gamma Factor - - R- 2 |
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| 162 | DPMS Modes - - R- 0 |
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| 163 | Standard Timing 1 - - R- 0 |
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| 164 | vertical Standard Timing 1 - R- 0 |
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| 165 | refresh Standard Timing 1 - R- 0 |
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| 166 | Standard Timing 2 - - R- 0 |
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| 167 | vertical Standard Timing 2 - R- 0 |
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| 168 | refresh Standard Timing 2 - R- 0 |
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| 169 | Standard Timing 3 - - R- 0 |
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| 170 | vertical Standard Timing 3 - R- 0 |
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| 171 | refresh Standard Timing 3 - R- 0 |
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| 172 | Standard Timing 4 - - R- 0 |
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| 173 | vertical Standard Timing 4 - R- 0 |
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| 174 | refresh Standard Timing 4 - R- 0 |
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| 175 | Standard Timing 5 - - R- 0 |
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| 176 | vertical Standard Timing 5 - R- 0 |
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| 177 | refresh Standard Timing 5 - R- 0 |
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| 178 | Standard Timing 6 - - R- 0 |
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| 179 | vertical Standard Timing 6 - R- 0 |
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| 180 | refresh Standard Timing 6 - R- 0 |
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| 181 | Standard Timing 7 - - R- 0 |
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| 182 | vertical Standard Timing 7 - R- 0 |
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| 183 | refresh Standard Timing 7 - R- 0 |
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| 184 | Standard Timing 8 - - R- 0 |
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| 185 | vertical Standard Timing 8 - R- 0 |
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| 186 | refresh Standard Timing 8 - R- 0 |
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| 187 | Max Pixel Clock (MHz) - - R- 0 |
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| 188 | |
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| 189 | LABEL FEATURE SYMBOL SYSCTL FILE:N |
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| 190 | Manufacturer ID SENSORS_DDCMON_MAN_ID id:1 |
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| 191 | Model Number SENSORS_DDCMON_PROD_ID id:2 |
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| 192 | Monitor Size (cm) SENSORS_DDCMON_VERSIZE size:1 |
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| 193 | hsize SENSORS_DDCMON_HORSIZE size:2 |
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| 194 | Vertical Sync (Hz) SENSORS_DDCMON_VERSYNCMIN sync:1 |
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| 195 | v_sync_max SENSORS_DDCMON_VERSYNCMAX sync:2 |
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| 196 | Horizontal Sync (KHz) SENSORS_DDCMON_HORSYNCMIN sync:3 |
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| 197 | h_sync_max SENSORS_DDCMON_HORSYNCMAX sync:4 |
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| 198 | Established Timings SENSORS_DDCMON_TIMINGS timings:1 |
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| 199 | Serial Number SENSORS_DDCMON_SERIAL serial:1 |
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| 200 | Manufacture Time SENSORS_DDCMON_YEAR time:1 |
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| 201 | week SENSORS_DDCMON_WEEK time:2 |
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| 202 | EDID Version SENSORS_DDCMON_EDID_VER edid:1 |
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| 203 | revision SENSORS_DDCMON_EDID_REV edid:2 |
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| 204 | Gamma Factor SENSORS_DDCMON_GAMMA gamma:1 |
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| 205 | DPMS Modes SENSORS_DDCMON_DPMS dpms:1 |
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| 206 | Standard Timing 1 SENSORS_DDCMON_TIMING1_HOR timing1:1 |
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| 207 | vertical SENSORS_DDCMON_TIMING1_VER timing1:2 |
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| 208 | refresh SENSORS_DDCMON_TIMING1_REF timing1:3 |
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| 209 | Standard Timing 2 SENSORS_DDCMON_TIMING2_HOR timing2:1 |
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| 210 | vertical SENSORS_DDCMON_TIMING2_VER timing2:2 |
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| 211 | refresh SENSORS_DDCMON_TIMING2_REF timing2:3 |
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| 212 | Standard Timing 3 SENSORS_DDCMON_TIMING3_HOR timing3:1 |
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| 213 | vertical SENSORS_DDCMON_TIMING3_VER timing3:2 |
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| 214 | refresh SENSORS_DDCMON_TIMING3_REF timing3:3 |
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| 215 | Standard Timing 4 SENSORS_DDCMON_TIMING4_HOR timing4:1 |
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| 216 | vertical SENSORS_DDCMON_TIMING4_VER timing4:2 |
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| 217 | refresh SENSORS_DDCMON_TIMING4_REF timing4:3 |
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| 218 | Standard Timing 5 SENSORS_DDCMON_TIMING5_HOR timing5:1 |
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| 219 | vertical SENSORS_DDCMON_TIMING5_VER timing5:2 |
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| 220 | refresh SENSORS_DDCMON_TIMING5_REF timing5:3 |
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| 221 | Standard Timing 6 SENSORS_DDCMON_TIMING6_HOR timing6:1 |
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| 222 | vertical SENSORS_DDCMON_TIMING6_VER timing6:2 |
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| 223 | refresh SENSORS_DDCMON_TIMING6_REF timing6:3 |
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| 224 | Standard Timing 7 SENSORS_DDCMON_TIMING7_HOR timing7:1 |
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| 225 | vertical SENSORS_DDCMON_TIMING7_VER timing7:2 |
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| 226 | refresh SENSORS_DDCMON_TIMING7_REF timing7:3 |
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| 227 | Standard Timing 8 SENSORS_DDCMON_TIMING8_HOR timing8:1 |
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| 228 | vertical SENSORS_DDCMON_TIMING8_VER timing8:2 |
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| 229 | refresh SENSORS_DDCMON_TIMING8_REF timing8:3 |
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| 230 | Max Pixel Clock (MHz) SENSORS_DDCMON_MAXCLOCK maxclock:1 |
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| 231 | |
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| 232 | |
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| 233 | Notes |
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| 234 | ----- |
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| 235 | |
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| 236 | - The eeprom.o module will also attach to a DDC monitor. Install the |
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| 237 | ddcmon.o module before the eeprom.o module to prevent this. |
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| 238 | Alternatively, give the eeprom.o module an ignore= parameter or |
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| 239 | a checksum= parameter. The ddcmon.o module will not attach to non-DDC |
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| 240 | eeproms because it checks for a DDC 'signature' at the beginning |
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| 241 | of the DDC Monitor's eeprom. Additionally, you can give it a checksum= |
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| 242 | parameter. |
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| 243 | |
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| 244 | - If a DDC monitor eeprom lacks the 'signature', you may use the |
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| 245 | 'force' parameter (modprobe ddcmon force=x,0x50 where 'x' is the |
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| 246 | i2c bus number). |
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| 247 | |
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| 248 | - This module requires a bus driver for your video chip to access the |
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| 249 | DDC bus. In this package, drivers exist for Voodoo3/Banshee chips. |
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| 250 | See documentation for those drivers in ../busses. Other drivers |
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| 251 | (Matrox and NVidia, for example) are available in the kernel or |
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| 252 | elsewhere. See our 'Supported Devices' web page for details. |
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| 253 | |
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| 254 | - There is a checksum over the 128 bytes in the eeprom. The driver |
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| 255 | used not to check it, now it does (providing you give it a |
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| 256 | checksum= parameter). |
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| 257 | |
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| 258 | - More information is available in the eeprom which could be made |
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| 259 | available by enhancing the driver. |
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| 260 | To see the entire eeprom, use the eeprom.o module instead of ddcmon.o. |
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| 261 | However, then you lose the DDC-specific formatting. |
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| 262 | Also see ../../prog/eeprom/decode-edid.pl. |
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| 263 | |
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| 264 | - This driver does not support the DDC/CI (DDC2Bi) bidirectional |
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| 265 | communications channel to the monitor for controlling the monitor. |
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| 266 | |
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| 267 | - The driver caches the data from the monitor and only rereads it |
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| 268 | from the eeprom if the cache is more than 5 minutes old. |
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| 269 | |
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| 270 | - X 4.0 also accesses the DDC monitor EEPROM to auto-configure itself. |
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| 271 | There could possibly be conflicts from these multiple accesses, but |
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| 272 | none were ever reported so far. |
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