| 1 | Kernel driver `i2c-piix4.o' |
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| 2 | |
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| 3 | Status: Complete and well-tested |
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| 4 | except for Victory66 support which is Alpha. |
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| 5 | |
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| 6 | Supported adapters: |
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| 7 | * Intel 82371AB PIIX4 and PIIX4E |
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| 8 | * Intel 82443MX (440MX) |
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| 9 | Datasheet: Publicly available at the Intel website |
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| 10 | * ServerWorks OSB4, CSB5, CSB6 and HT-1000 southbridges |
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| 11 | Datasheet: Only available via NDA from ServerWorks |
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| 12 | * ATI IXP southbridges IXP200, IXP300, IXP400 |
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| 13 | Datasheet: Not publicly available |
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| 14 | * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge |
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| 15 | Datasheet: Publicly available at the SMSC website http://www.smsc.com |
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| 16 | |
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| 17 | Author: Frodo Looijaard <frodol@dds.nl> and Philip Edelbrock |
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| 18 | <phil@netroedge.com> |
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| 19 | |
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| 20 | |
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| 21 | Module Parameters |
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| 22 | ----------------- |
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| 23 | |
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| 24 | * force: int |
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| 25 | Forcibly enable the PIIX4. DANGEROUS! |
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| 26 | * force_addr: int |
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| 27 | Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS! |
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| 28 | |
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| 29 | |
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| 30 | Description |
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| 31 | ----------- |
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| 32 | |
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| 33 | The PIIX4 (properly known as the 82371AB) is an Intel chip with a lot of |
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| 34 | functionality. Among other things, it implements the PCI bus. One of its |
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| 35 | minor functions is implementing a System Management Bus. This is a true |
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| 36 | SMBus - you can not access it on I2C levels. The good news is that it |
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| 37 | natively understands SMBus commands and you do not have to worry about |
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| 38 | timing problems. The bad news is that non-SMBus devices connected to it |
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| 39 | can confuse it mightily. Yes, this is known to happen... |
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| 40 | |
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| 41 | Cat /proc/pci, and see whether it contains an entry like this: |
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| 42 | |
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| 43 | Bus 0, device 1, function 3: |
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| 44 | Bridge: Intel 82371AB PIIX4 ACPI (rev 1). |
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| 45 | Medium devsel. Fast back-to-back capable. |
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| 46 | |
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| 47 | Bus and device numbers may differ, but the function number must be identical |
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| 48 | (like many PCI devices, the PIIX4 incorporates a number of different |
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| 49 | 'functions', which can be considered as separate devices). If you find such |
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| 50 | an entry, you have a PIIX4 SMBus controller. |
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| 51 | |
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| 52 | On some computers (most notably, some Dells), the SMBus is disabled by |
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| 53 | default. If you use the insmod parameter 'force=1', the kernel module |
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| 54 | will try to enable it. THIS IS VERY DANGEROUS! If the BIOS did not |
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| 55 | set up a correct address for this module, you could get in big trouble |
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| 56 | (read: crashes, data corruption, etc.). Try this only as a last resort |
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| 57 | (try BIOS updates first, for example), and backup first! An even more |
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| 58 | dangerous option is 'force_addr=<IOPORT>'. This will not only enable the |
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| 59 | PIIX4 like 'force' foes, but it will also set a new base I/O port address. |
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| 60 | The SMBus parts of the PIIX4 needs a range of 8 of these addresses to |
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| 61 | function correctly. If these addresses are already reserved by some other |
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| 62 | device, you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY |
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| 63 | SURE ABOUT WHAT YOU ARE DOING! |
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| 64 | |
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| 65 | The PIIX4E is just an new version of the PIIX4; it is supported as well. The |
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| 66 | PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use this |
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| 67 | driver on those mainboards. |
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| 68 | |
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| 69 | The ServerWorks Southbridges, the Intel 440MX, |
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| 70 | and the Victory766 are identical to the PIIX4 in I2C/SMBus support. |
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| 71 | |
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| 72 | If you own Force CPCI735 motherboard or other OSB4 based systems you may need |
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| 73 | to change the SMBus Interrupt Select register so the SMBus controller uses |
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| 74 | the SMI mode. |
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| 75 | |
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| 76 | 1) Use lspci command and locate the PCI device with the SMBus controller: |
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| 77 | 00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f) |
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| 78 | The line may vary for different chipsets. Please consult the driver source |
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| 79 | for all possible PCI ids (and lspci -n to match them). Lets assume the |
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| 80 | device is located at 00:0f.0. |
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| 81 | 2) Now you just need to change the value in 0xD2 register. Get it first with |
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| 82 | command: lspci -xxx -s 00:0f.0 |
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| 83 | If the value is 0x3 then you need to change it to 0x1 |
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| 84 | setpci -s 00:0f.0 d2.b=1 |
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| 85 | |
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| 86 | Please note that you don't need to do that in all cases, just when the SMBus is |
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| 87 | not working properly. |
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