root/lm-sensors/trunk/doc/busses/i2c-piix4 @ 4050

Revision 4050, 3.2 KB (checked in by khali, 7 years ago)

i2c-piix4: Add ATI IXP200, IXP300, IXP400 support (2.6 backport)

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  • Property svn:keywords set to Author Date Id Revision
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1Kernel driver `i2c-piix4.o'
2
3Status: Complete and well-tested
4        except for Victory66 support which is Alpha.
5
6Supported adapters:
7  * Intel 82371AB PIIX4 and PIIX4E
8  * Intel 82443MX (440MX)
9    Datasheet: Publicly available at the Intel website
10  * ServerWorks OSB4, CSB5, CSB6 and HT-1000 southbridges
11    Datasheet: Only available via NDA from ServerWorks
12  * ATI IXP southbridges IXP200, IXP300, IXP400
13    Datasheet: Not publicly available
14  * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
15    Datasheet: Publicly available at the SMSC website http://www.smsc.com
16
17Author: Frodo Looijaard <frodol@dds.nl> and Philip Edelbrock
18        <phil@netroedge.com>
19
20
21Module Parameters
22-----------------
23
24* force: int
25  Forcibly enable the PIIX4. DANGEROUS!
26* force_addr: int
27  Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
28* fix_hstcfg: int
29  Fix config register. Needed on some boards (Force CPCI735).
30
31
32Description
33-----------
34
35The PIIX4 (properly known as the 82371AB) is an Intel chip with a lot of
36functionality. Among other things, it implements the PCI bus. One of its
37minor functions is implementing a System Management Bus. This is a true
38SMBus - you can not access it on I2C levels. The good news is that it
39natively understands SMBus commands and you do not have to worry about
40timing problems. The bad news is that non-SMBus devices connected to it
41can confuse it mightily. Yes, this is known to happen...
42
43Cat /proc/pci, and see whether it contains an entry like this:
44
45  Bus  0, device   1, function  3:
46    Bridge: Intel 82371AB PIIX4 ACPI (rev 1).
47      Medium devsel.  Fast back-to-back capable. 
48
49Bus and device numbers may differ, but the function number must be identical
50(like many PCI devices, the PIIX4 incorporates a number of different
51'functions', which can be considered as separate devices). If you find such
52an entry, you have a PIIX4 SMBus controller.
53
54On some computers (most notably, some Dells), the SMBus is disabled by
55default. If you use the insmod parameter 'force=1', the kernel module
56 will try to enable it. THIS IS VERY DANGEROUS! If the BIOS did not
57set up a correct address for this module, you could get in big trouble
58(read: crashes, data corruption, etc.). Try this only as a last resort
59(try BIOS updates first, for example), and backup first! An even more
60dangerous option is 'force_addr=<IOPORT>'. This will not only enable the
61PIIX4 like 'force' foes, but it will also set a new base I/O port address.
62The SMBus parts of the PIIX4 needs a range of 8 of these addresses to
63function correctly. If these addresses are already reserved by some other
64device, you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY
65SURE ABOUT WHAT YOU ARE DOING!
66
67The PIIX4E is just an new version of the PIIX4; it is supported as well. The
68PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use this
69driver on those mainboards.
70
71The ServerWorks Southbridges, the Intel 440MX,
72and the Victory766 are identical to the PIIX4 in I2C/SMBus support.
73
74A few OSB4 southbridges are known to be misconfigured by the BIOS. In this
75case, you have you use the fix_hstcfg module parameter. Do not use it
76unless you know you have to, because in some cases it also breaks
77configuration on southbridges that don't need it.
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